This little series does a few little cleanups as well as implements the PMA fix on Broadwell. The cleanups are focussed around letting us not set 3DSTATE_WM_DEPTH_STENCIL::Depth/StencilBufferWriteEnable unless we absolutely need to. It turns out that Intel hardware makes early/late depth test decisions based on these bits and enabling depth or stencil writes when not needed can cause performance problems.
I also have patches for the Sky Lake stencil PMA fix but I'm seeing hangs in Dota 2 so I won't send those out until we figure out why. Jason Ekstrand (5): anv: Disable stencil writes when both write masks are zero genxml: Add the CACHE_MODE_1 register on gen8 anv: Add support for the PMA fix on Broadwell anv/pipeline: Make a copy of VkPipelineDepthStencilStateCreateinfo anv/pipeline: Be smarter about depth/stencil state src/intel/genxml/gen8.xml | 21 ++++ src/intel/vulkan/TODO | 1 - src/intel/vulkan/anv_cmd_buffer.c | 1 + src/intel/vulkan/anv_genX.h | 3 + src/intel/vulkan/anv_private.h | 11 +++ src/intel/vulkan/gen7_cmd_buffer.c | 11 +++ src/intel/vulkan/gen8_cmd_buffer.c | 147 ++++++++++++++++++++++++++++ src/intel/vulkan/genX_blorp_exec.c | 5 + src/intel/vulkan/genX_cmd_buffer.c | 10 ++ src/intel/vulkan/genX_pipeline.c | 192 ++++++++++++++++++++++++++++--------- 10 files changed, 357 insertions(+), 45 deletions(-) -- 2.5.0.400.gff86faf _______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
