I hadn't bothered to set this bit because I figured it would just
paper over us getting the rectangle wrong. But it turns out that
there is a legitimate reason to use it, so let's do so.
The alternative would be to chop up 16k clears to multiple 8k clears,
which is pointlessly painful.
Signed-off-by: Kenneth Graunke <kenn...@whitecape.org>
---
src/mesa/drivers/dri/i965/gen8_depth_state.c | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/gen8_depth_state.c
b/src/mesa/drivers/dri/i965/gen8_depth_state.c
index ec296698267..de5a16e91bf 100644
--- a/src/mesa/drivers/dri/i965/gen8_depth_state.c
+++ b/src/mesa/drivers/dri/i965/gen8_depth_state.c
@@ -477,6 +477,17 @@ gen8_hiz_exec(struct brw_context *brw, struct
intel_mipmap_tree *mt,
break;
case BLORP_HIZ_OP_DEPTH_CLEAR:
dw1 |= GEN8_WM_HZ_DEPTH_CLEAR;
+
+ /* The "Clear Rectangle X Max" (and Y Max) fields are exclusive,
+ * rather than inclusive, and limited to 16383. This means that
+ * for a 16384x16384 render target, we would miss the last pixel.
+ *
+ * To work around this, we have to set the "Full Surface Depth
+ * and Stencil Clear" bit. We can do this in all cases because
+ * we always clear the full rectangle anyway. We'll need to
+ * change this if we ever add scissored clear support.
+ */
+ dw1 |= GEN8_WM_HZ_FULL_SURFACE_DEPTH_CLEAR;
break;
case BLORP_HIZ_OP_NONE:
unreachable("Should not get here.");
--
2.11.0
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