From: Marek Olšák <marek.ol...@amd.com>
---
src/gallium/drivers/radeonsi/si_cp_dma.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_cp_dma.c
b/src/gallium/drivers/radeonsi/si_cp_dma.c
index 45f20dd..aed8bb8 100644
--- a/src/gallium/drivers/radeonsi/si_cp_dma.c
+++ b/src/gallium/drivers/radeonsi/si_cp_dma.c
@@ -184,23 +184,22 @@ static void si_clear_buffer(struct pipe_context *ctx,
struct pipe_resource *dst,
return;
/* Mark the buffer range of destination as valid (initialized),
* so that transfer_map knows it should wait for the GPU when mapping
* that range. */
util_range_add(&rdst->valid_buffer_range, offset,
offset + size);
/* Fallback for unaligned clears. */
if (offset % 4 != 0 || size % 4 != 0) {
- uint8_t *map = sctx->b.ws->buffer_map(r600_resource(dst)->buf,
- sctx->b.gfx.cs,
- PIPE_TRANSFER_WRITE);
+ uint8_t *map = r600_buffer_map_sync_with_rings(&sctx->b, rdst,
+
PIPE_TRANSFER_WRITE);
map += offset;
for (uint64_t i = 0; i < size; i++) {
unsigned byte_within_dword = (offset + i) % 4;
*map++ = (value >> (byte_within_dword * 8)) & 0xff;
}
return;
}
/* dma_clear_buffer can use clear_buffer on failure. Make sure that
* doesn't happen. We don't want an infinite recursion: */
--
2.7.4
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