From: Ian Romanick <ian.d.roman...@intel.com>
Signed-off-by: Ian Romanick <ian.d.roman...@intel.com>
---
src/compiler/glsl/ir_optimization.h | 1 +
src/compiler/glsl/lower_64bit.cpp | 11 +++++++++++
2 files changed, 12 insertions(+)
diff --git a/src/compiler/glsl/ir_optimization.h
b/src/compiler/glsl/ir_optimization.h
index e4f78f0..3f0ef7d 100644
--- a/src/compiler/glsl/ir_optimization.h
+++ b/src/compiler/glsl/ir_optimization.h
@@ -53,6 +53,7 @@
/* Opertaions for lower_64bit_integer_instructions() */
#define MUL64 (1U << 0)
#define SIGN64 (1U << 1)
+#define DIV64 (1U << 2)
/**
* \see class lower_packing_builtins_visitor
diff --git a/src/compiler/glsl/lower_64bit.cpp
b/src/compiler/glsl/lower_64bit.cpp
index cc2c4aa..1bd55c9 100644
--- a/src/compiler/glsl/lower_64bit.cpp
+++ b/src/compiler/glsl/lower_64bit.cpp
@@ -368,6 +368,17 @@ lower_64bit_visitor::handle_rvalue(ir_rvalue **rvalue)
}
break;
+ case ir_binop_div:
+ if (lowering(DIV64)) {
+ if (ir->type->base_type == GLSL_TYPE_UINT64) {
+ *rvalue = handle_op(ir, "__builtin_udiv64", generate_ir::udiv64);
+ } else {
+ *rvalue = handle_op(ir, "__builtin_idiv64", generate_ir::idiv64);
+ }
+ this->progress = true;
+ }
+ break;
+
case ir_binop_mul:
if (lowering(MUL64)) {
*rvalue = handle_op(ir, "__builtin_umul64", generate_ir::umul64);
--
2.7.4
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