On Tue, Nov 01, 2016 at 07:24:50AM +0200, Pohjolainen, Topi wrote:
> On Mon, Oct 31, 2016 at 02:51:06PM -0700, Jason Ekstrand wrote:
> > On Mon, Oct 31, 2016 at 2:38 PM, Jason Ekstrand
> > <[1]ja...@jlekstrand.net> wrote:
> >
> > On Tue, Oct 11, 2016 at 12:26 PM, Topi Pohjolainen
> > <[2]topi.pohjolai...@gmail.com> wrote:
> >
> > From: Ben Widawsky <[3]b...@bwidawsk.net>
> > Signed-off-by: Ben Widawsky <[4]benjamin.widaw...@intel.com>
> > ---
> > src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 51
> > ++++++++++++++++++---------
> > 1 file changed, 34 insertions(+), 17 deletions(-)
> > diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
> > b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
> > index f51392f..a41a654 100644
> > --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
> > +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
> > @@ -224,33 +224,50 @@ intel_miptree_supports_non_msr
> > t_fast_clear(struct brw_context *brw,
> > return false;
> > }
> > + /* Handle the hardware restrictions...
> > + *
> > + * All GENs have the following restriction: "MCS buffer for
> > non-MSRT is
> > + * supported only for RT formats 32bpp, 64bpp, and 128bpp."
> > + *
> > + * From the HSW PRM Volume 7: 3D-Media-GPGPU, page 652: (Color
> > Clear of
> > + * Non-MultiSampler Render Target Restrictions) Support is for
> > non-mip-mapped
> > + * and non-array surface types only.
> > + *
> > + * From the BDW PRM Volume 7: 3D-Media-GPGPU, page 649: (Color
> > Clear of
> > + * Non-MultiSampler Render Target Restriction). Mip-mapped and
> > arrayed
> > + * surfaces are supported with MCS buffer layout with these
> > alignments in the
> > + * RT space: Horizontal Alignment = 256 and Vertical Alignment =
> > 128.
> > + *
> > + * Skylake and above (docs are currently unpublished) are
> > similar to BDW with
> >
> > Heh... Old patch. We should put in the real PRM citation.
>
> Do you have one specifically in mind? I haven't found any other piece
> directly telling that arrayed and mipmapped is supported.
I think I understood what you meant, you were referring to the SKL part which
should be:
* From the SKL PRM Volume 7: 3D-Media-GPGPU, page 632: (Color Clear of
* Non-MultiSampler Render Target Restriction). Mip-mapped and arrayed
* surfaces are supported with MCS buffer layout with these alignments in
* the RT space: Horizontal Alignment = 128 and Vertical Alignment = 64.
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