On Tue, Oct 11, 2016 at 12:26 PM, Topi Pohjolainen <
topi.pohjolai...@gmail.com> wrote:
> Signed-off-by: Topi Pohjolainen <topi.pohjolai...@intel.com>
> ---
> src/intel/isl/isl.c | 3 +--
> src/mesa/drivers/dri/i965/brw_blorp.c | 6 +++---
> src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 23
> +++++++++++++----------
> src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 3 ++-
> 4 files changed, 19 insertions(+), 16 deletions(-)
>
> diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c
> index 66e2df3..7e1e720 100644
> --- a/src/intel/isl/isl.c
> +++ b/src/intel/isl/isl.c
> @@ -1430,8 +1430,7 @@ isl_surf_get_ccs_surf(const struct isl_device *dev,
> assert(ISL_DEV_GEN(dev) >= 7);
>
> assert(ISL_DEV_GEN(dev) >= 8 || surf->dim == ISL_SURF_DIM_2D);
> -
> - assert(surf->logical_level0_px.depth == 1);
> + assert(ISL_DEV_GEN(dev) >= 8 || surf->logical_level0_px.depth == 1);
>
I have a patch in my series which fixes this and another assert or two.
>
> /* TODO: More conditions where it can fail. */
>
> diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c
> b/src/mesa/drivers/dri/i965/brw_blorp.c
> index 4e3359c..ee81ffc 100644
> --- a/src/mesa/drivers/dri/i965/brw_blorp.c
> +++ b/src/mesa/drivers/dri/i965/brw_blorp.c
> @@ -773,7 +773,7 @@ set_slice_fast_clear_color(struct brw_context *brw,
> {
> bool updated = false;
>
> - assert(first_layer == 0 && num_layers == 1);
> + assert(brw->gen >= 8 || (first_layer == 0 && num_layers == 1));
>
> for (unsigned i = 0; i < num_layers; ++i) {
> updated |= brw_meta_set_fast_clear_color(
> @@ -912,7 +912,7 @@ do_single_blorp_clear(struct brw_context *brw, struct
> gl_framebuffer *fb,
> * INTEL_FAST_CLEAR_STATE_CLEAR so that we won't waste time doing
> * redundant clears.
> */
> - intel_miptree_set_fast_clear_state(irb->mt, irb->mt_level,
> + intel_miptree_set_fast_clear_state(brw, irb->mt, irb->mt_level,
> layer, num_layers,
> INTEL_FAST_CLEAR_STATE_CLEAR);
> } else {
> @@ -993,7 +993,7 @@ brw_blorp_resolve_color(struct brw_context *brw,
> struct intel_mipmap_tree *mt,
> brw_blorp_to_isl_format(brw, format, true));
> blorp_batch_finish(&batch);
>
> - intel_miptree_set_fast_clear_state(mt, level, layer, 1,
> + intel_miptree_set_fast_clear_state(brw, mt, level, layer, 1,
> INTEL_FAST_CLEAR_STATE_RESOLVED);
> }
>
> diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
> b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
> index a41a654..932220e 100644
> --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
> +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
> @@ -1590,7 +1590,7 @@ intel_miptree_alloc_mcs(struct brw_context *brw,
>
> /* Multisampled miptrees are only supported for single level. */
> assert(mt->first_level == 0);
> - intel_miptree_set_fast_clear_state(mt, mt->first_level, 0,
> + intel_miptree_set_fast_clear_state(brw, mt, mt->first_level, 0,
> mt->logical_depth0,
> INTEL_FAST_CLEAR_STATE_CLEAR);
>
> @@ -2167,34 +2167,37 @@ intel_miptree_get_fast_clear_state(const struct
> intel_mipmap_tree *mt,
> }
>
> static void
> -intel_miptree_check_color_resolve(const struct intel_mipmap_tree *mt,
> +intel_miptree_check_color_resolve(const struct brw_context *brw,
> + const struct intel_mipmap_tree *mt,
> unsigned level, unsigned layer)
> {
> if (!mt->mcs_mt)
> return;
>
> - /* Fast color clear is not supported for mipmapped surfaces. */
> - assert(level == 0 && mt->first_level == 0 && mt->last_level == 0);
> + /* Fast color clear is supported for mipmapped surfaces only on Gen8+.
> */
> + assert(brw->gen >= 8 ||
> + (level == 0 && mt->first_level == 0 && mt->last_level == 0));
>
> /* Compression of arrayed msaa surfaces is supported. */
> if (mt->num_samples > 1)
> return;
>
> - /* Fast color clear is not supported for non-msaa arrays. */
> - assert(layer == 0 && mt->logical_depth0 == 1);
> + /* Fast color clear is supported for non-msaa arrays only on Gen8+. */
> + assert(brw->gen >= 8 || (layer == 0 && mt->logical_depth0 == 1));
>
> (void)level;
> (void)layer;
> }
>
> void
> -intel_miptree_set_fast_clear_state(struct intel_mipmap_tree *mt,
> +intel_miptree_set_fast_clear_state(const struct brw_context *brw,
> + struct intel_mipmap_tree *mt,
> unsigned level,
> unsigned first_layer,
> unsigned num_layers,
> enum intel_fast_clear_state new_state)
> {
> - intel_miptree_check_color_resolve(mt, level, first_layer);
> + intel_miptree_check_color_resolve(brw, mt, level, first_layer);
>
> assert(first_layer + num_layers <= mt->physical_depth0);
>
> @@ -2232,7 +2235,7 @@ intel_miptree_used_for_rendering(const struct
> brw_context *brw,
> if (is_lossless_compressed ||
> fast_clear_state == INTEL_FAST_CLEAR_STATE_CLEAR) {
> intel_miptree_set_fast_clear_state(
> - mt, level, start_layer + i, 1,
> + brw, mt, level, start_layer + i, 1,
> INTEL_FAST_CLEAR_STATE_UNRESOLVED);
> }
> }
> @@ -2269,7 +2272,7 @@ intel_miptree_resolve_color(struct brw_context *brw,
> unsigned level, unsigned layer,
> int flags)
> {
> - intel_miptree_check_color_resolve(mt, level, layer);
> + intel_miptree_check_color_resolve(brw, mt, level, layer);
>
> if (!intel_miptree_needs_color_resolve(brw, mt, flags))
> return false;
> diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
> b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
> index 1ba2fb9..e98a935 100644
> --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
> +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
> @@ -897,7 +897,8 @@ intel_miptree_get_fast_clear_state(const struct
> intel_mipmap_tree *mt,
> unsigned level, unsigned layer);
>
> void
> -intel_miptree_set_fast_clear_state(struct intel_mipmap_tree *mt,
> +intel_miptree_set_fast_clear_state(const struct brw_context *brw,
> + struct intel_mipmap_tree *mt,
> unsigned level,
> unsigned first_layer,
> unsigned num_layers,
> --
> 2.5.5
>
> _______________________________________________
> mesa-dev mailing list
> mesa-dev@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/mesa-dev
>
_______________________________________________
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev
