On Sun, Oct 30, 2016 at 5:20 PM, Karol Herbst <karolher...@gmail.com> wrote:
> total instructions in shared programs : 3491273 -> 3487792 (-0.10%)
> total gprs used in shared programs : 453803 -> 453804 (0.00%)
> total local used in shared programs : 21621 -> 21621 (0.00%)
> total bytes used in shared programs : 32000072 -> 31968072 (-0.10%)
>
> local gpr inst bytes
> helped 0 26 1937 1937
> hurt 0 23 81 81
>
> v2: reorder to show the benefit of this patch
>
> Signed-off-by: Karol Herbst <karolher...@gmail.com>
> ---
> src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp | 3 +--
> 1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp
> b/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp
> index d36c853..d3e04c0 100644
> --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp
> +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp
> @@ -1468,8 +1468,7 @@ GCRA::allocateRegisters(ArrayList& insns)
> nodes[i].init(regs, lval);
> RIG.insert(&nodes[i]);
>
> - if (lval->inFile(FILE_GPR) && lval->getInsn() != NULL &&
> - prog->getTarget()->getChipset() < 0xc0) {
> + if (lval->inFile(FILE_GPR) && lval->getInsn() != NULL) {
Drop the flagsDef thing below as well? Or make it conditional on the
chipset? (Should work fine for GF100+ afaik.)
By the way, you could probably get some of the hurt back on nvc0 by
only doing this for GF100+ when src(1) is an immediate. (There's a
benefit either way for nv50.)
> Instruction *insn = lval->getInsn();
> if (insn->op == OP_MAD || insn->op == OP_SAD)
> // Short encoding only possible if they're all GPRs, no need
> to
> --
> 2.10.1
>
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