---
src/intel/blorp/blorp.c | 4 ++--
src/intel/vulkan/anv_pipeline.c | 2 +-
src/mesa/drivers/dri/i965/brw_compiler.h | 1 +
src/mesa/drivers/dri/i965/brw_fs.cpp | 33 ++++++++++++++++----------------
src/mesa/drivers/dri/i965/brw_wm.c | 2 +-
5 files changed, 21 insertions(+), 21 deletions(-)
diff --git a/src/intel/blorp/blorp.c b/src/intel/blorp/blorp.c
index 3ef3e70..30b17c5 100644
--- a/src/intel/blorp/blorp.c
+++ b/src/intel/blorp/blorp.c
@@ -206,8 +206,8 @@ blorp_compile_fs(struct blorp_context *blorp, void *mem_ctx,
const unsigned *program =
brw_compile_fs(compiler, blorp->driver_ctx, mem_ctx, wm_key,
- &wm_prog_data, nir, NULL, -1, -1, false, use_repclear,
- NULL, program_size, NULL);
+ &wm_prog_data, nir->info, nir, NULL, -1, -1, false,
+ use_repclear, NULL, program_size, NULL);
/* Copy the relavent bits of wm_prog_data over into the blorp prog data */
prog_data->dispatch_8 = wm_prog_data.dispatch_8;
diff --git a/src/intel/vulkan/anv_pipeline.c b/src/intel/vulkan/anv_pipeline.c
index 9481e18..dc5a589 100644
--- a/src/intel/vulkan/anv_pipeline.c
+++ b/src/intel/vulkan/anv_pipeline.c
@@ -677,7 +677,7 @@ anv_pipeline_compile_fs(struct anv_pipeline *pipeline,
unsigned code_size;
const unsigned *shader_code =
- brw_compile_fs(compiler, NULL, mem_ctx, &key, &prog_data, nir,
+ brw_compile_fs(compiler, NULL, mem_ctx, &key, &prog_data, nir->info,
nir,
NULL, -1, -1, true, false, NULL, &code_size, NULL);
if (shader_code == NULL) {
ralloc_free(mem_ctx);
diff --git a/src/mesa/drivers/dri/i965/brw_compiler.h
b/src/mesa/drivers/dri/i965/brw_compiler.h
index 4fe9343..4e306db 100644
--- a/src/mesa/drivers/dri/i965/brw_compiler.h
+++ b/src/mesa/drivers/dri/i965/brw_compiler.h
@@ -839,6 +839,7 @@ brw_compile_fs(const struct brw_compiler *compiler, void
*log_data,
void *mem_ctx,
const struct brw_wm_prog_key *key,
struct brw_wm_prog_data *prog_data,
+ shader_info *info,
const struct nir_shader *shader,
struct gl_program *prog,
int shader_time_index8,
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp
b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 6c35cb4..99d535e 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -6276,10 +6276,10 @@ brw_compute_flat_inputs(struct brw_wm_prog_data
*prog_data,
}
static uint8_t
-computed_depth_mode(const nir_shader *shader)
+computed_depth_mode(const shader_info *info)
{
- if (shader->info->outputs_written & BITFIELD64_BIT(FRAG_RESULT_DEPTH)) {
- switch (shader->info->fs.depth_layout) {
+ if (info->outputs_written & BITFIELD64_BIT(FRAG_RESULT_DEPTH)) {
+ switch (info->fs.depth_layout) {
case FRAG_DEPTH_LAYOUT_NONE:
case FRAG_DEPTH_LAYOUT_ANY:
return BRW_PSCDEPTH_ON;
@@ -6411,6 +6411,7 @@ brw_compile_fs(const struct brw_compiler *compiler, void
*log_data,
void *mem_ctx,
const struct brw_wm_prog_key *key,
struct brw_wm_prog_data *prog_data,
+ shader_info *info,
const nir_shader *src_shader,
struct gl_program *prog,
int shader_time_index8, int shader_time_index16,
@@ -6432,23 +6433,22 @@ brw_compile_fs(const struct brw_compiler *compiler,
void *log_data,
/* key->alpha_test_func means simulating alpha testing via discards,
* so the shader definitely kills pixels.
*/
- prog_data->uses_kill = shader->info->fs.uses_discard ||
- key->alpha_test_func;
+ prog_data->uses_kill = info->fs.uses_discard || key->alpha_test_func;
prog_data->uses_omask = key->multisample_fbo &&
- shader->info->outputs_written & BITFIELD64_BIT(FRAG_RESULT_SAMPLE_MASK);
- prog_data->computed_depth_mode = computed_depth_mode(shader);
+ info->outputs_written & BITFIELD64_BIT(FRAG_RESULT_SAMPLE_MASK);
+ prog_data->computed_depth_mode = computed_depth_mode(info);
prog_data->computed_stencil =
- shader->info->outputs_written & BITFIELD64_BIT(FRAG_RESULT_STENCIL);
+ info->outputs_written & BITFIELD64_BIT(FRAG_RESULT_STENCIL);
prog_data->persample_dispatch =
key->multisample_fbo &&
(key->persample_interp ||
- (shader->info->system_values_read & (SYSTEM_BIT_SAMPLE_ID |
+ (info->system_values_read & (SYSTEM_BIT_SAMPLE_ID |
SYSTEM_BIT_SAMPLE_POS)) ||
- shader->info->fs.uses_sample_qualifier ||
- shader->info->outputs_read);
+ info->fs.uses_sample_qualifier ||
+ info->outputs_read);
- prog_data->early_fragment_tests = shader->info->fs.early_fragment_tests;
+ prog_data->early_fragment_tests = info->fs.early_fragment_tests;
prog_data->barycentric_interp_modes =
brw_compute_barycentric_interp_modes(compiler->devinfo, shader);
@@ -6458,7 +6458,7 @@ brw_compile_fs(const struct brw_compiler *compiler, void
*log_data,
unsigned simd8_grf_used = 0, simd16_grf_used = 0;
fs_visitor v8(compiler, log_data, mem_ctx, key,
- &prog_data->base, prog, shader, shader->info, 8,
+ &prog_data->base, prog, shader, info, 8,
shader_time_index8);
if (!v8.run_fs(allow_spilling, false /* do_rep_send */)) {
if (error_str)
@@ -6475,7 +6475,7 @@ brw_compile_fs(const struct brw_compiler *compiler, void
*log_data,
likely(!(INTEL_DEBUG & DEBUG_NO16) || use_rep_send)) {
/* Try a SIMD16 compile */
fs_visitor v16(compiler, log_data, mem_ctx, key,
- &prog_data->base, prog, shader, shader->info, 16,
+ &prog_data->base, prog, shader, info, 16,
shader_time_index16);
v16.import_uniforms(&v8);
if (!v16.run_fs(allow_spilling, use_rep_send)) {
@@ -6531,9 +6531,8 @@ brw_compile_fs(const struct brw_compiler *compiler, void
*log_data,
if (unlikely(INTEL_DEBUG & DEBUG_WM)) {
g.enable_debug(ralloc_asprintf(mem_ctx, "%s fragment shader %s",
- shader->info->label ?
- shader->info->label : "unnamed",
- shader->info->name));
+ info->label ? info->label : "unnamed",
+ info->name));
}
if (simd8_cfg) {
diff --git a/src/mesa/drivers/dri/i965/brw_wm.c
b/src/mesa/drivers/dri/i965/brw_wm.c
index 31ffde5..a127c12 100644
--- a/src/mesa/drivers/dri/i965/brw_wm.c
+++ b/src/mesa/drivers/dri/i965/brw_wm.c
@@ -145,7 +145,7 @@ brw_codegen_wm_prog(struct brw_context *brw,
char *error_str = NULL;
program = brw_compile_fs(brw->screen->compiler, brw, mem_ctx,
- key, &prog_data, fp->program.nir,
+ key, &prog_data, &fp->program.info,
fp->program.nir,
&fp->program, st_index8, st_index16,
true, brw->use_rep_send, vue_map,
&program_size, &error_str);
--
2.5.0.400.gff86faf
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