On 24/10/16 18:02, Jason Ekstrand wrote:
On Mon, Oct 24, 2016 at 8:22 AM, Jason Ekstrand <ja...@jlekstrand.net
<mailto:ja...@jlekstrand.net>> wrote:
On Oct 24, 2016 2:58 AM, "Lionel Landwerlin"
<lionel.g.landwer...@intel.com
<mailto:lionel.g.landwer...@intel.com>> wrote:
>
> Reviewed-by: Lionel Landwerlin <lionel.g.landwer...@intel.com
<mailto:lionel.g.landwer...@intel.com>>
>
> Would adding the single register for gen6 makes sense?
It's not needed for this series but it wouldn't hurt. I'll add it
to the patch.
Upon further inspection, that register appears to not exist on gen6.
Sorry, got confused by Ken's response.
> On 22/10/16 18:50, Jason Ekstrand wrote:
>>
>> ---
>> src/intel/genxml/gen7.xml | 16 ++++++++++++++++
>> src/intel/genxml/gen75.xml | 16 ++++++++++++++++
>> src/intel/genxml/gen8.xml | 16 ++++++++++++++++
>> src/intel/genxml/gen9.xml | 16 ++++++++++++++++
>> 4 files changed, 64 insertions(+)
>>
>> diff --git a/src/intel/genxml/gen7.xml b/src/intel/genxml/gen7.xml
>> index a950603..8461bd0 100644
>> --- a/src/intel/genxml/gen7.xml
>> +++ b/src/intel/genxml/gen7.xml
>> @@ -2555,4 +2555,20 @@
>> <field name="T Low Bandwidth" start="21" end="21"
type="uint"/>
>> </register>
>> + <register name="SO_WRITE_OFFSET0" length="1" num="0x5280">
>> + <field name="Write Offset" start="2" end="31" type="offset"/>
>> + </register>
>> +
>> + <register name="SO_WRITE_OFFSET1" length="1" num="0x5284">
>> + <field name="Write Offset" start="2" end="31" type="offset"/>
>> + </register>
>> +
>> + <register name="SO_WRITE_OFFSET2" length="1" num="0x5288">
>> + <field name="Write Offset" start="2" end="31" type="offset"/>
>> + </register>
>> +
>> + <register name="SO_WRITE_OFFSET3" length="1" num="0x528c">
>> + <field name="Write Offset" start="2" end="31" type="offset"/>
>> + </register>
>> +
>> </genxml>
>> diff --git a/src/intel/genxml/gen75.xml
b/src/intel/genxml/gen75.xml
>> index 2c522d5..168c5cc 100644
>> --- a/src/intel/genxml/gen75.xml
>> +++ b/src/intel/genxml/gen75.xml
>> @@ -2971,4 +2971,20 @@
>> <field name="L3 Atomic Disable Mask" start="22" end="22"
type="uint"/>
>> </register>
>> + <register name="SO_WRITE_OFFSET0" length="1" num="0x5280">
>> + <field name="Write Offset" start="2" end="31" type="offset"/>
>> + </register>
>> +
>> + <register name="SO_WRITE_OFFSET1" length="1" num="0x5284">
>> + <field name="Write Offset" start="2" end="31" type="offset"/>
>> + </register>
>> +
>> + <register name="SO_WRITE_OFFSET2" length="1" num="0x5288">
>> + <field name="Write Offset" start="2" end="31" type="offset"/>
>> + </register>
>> +
>> + <register name="SO_WRITE_OFFSET3" length="1" num="0x528c">
>> + <field name="Write Offset" start="2" end="31" type="offset"/>
>> + </register>
>> +
>> </genxml>
>> diff --git a/src/intel/genxml/gen8.xml b/src/intel/genxml/gen8.xml
>> index 73c9265..07672ba 100644
>> --- a/src/intel/genxml/gen8.xml
>> +++ b/src/intel/genxml/gen8.xml
>> @@ -3175,4 +3175,20 @@
>> <field name="All Allocation" start="25" end="31"
type="uint"/>
>> </register>
>> + <register name="SO_WRITE_OFFSET0" length="1" num="0x5280">
>> + <field name="Write Offset" start="2" end="31" type="offset"/>
>> + </register>
>> +
>> + <register name="SO_WRITE_OFFSET1" length="1" num="0x5284">
>> + <field name="Write Offset" start="2" end="31" type="offset"/>
>> + </register>
>> +
>> + <register name="SO_WRITE_OFFSET2" length="1" num="0x5288">
>> + <field name="Write Offset" start="2" end="31" type="offset"/>
>> + </register>
>> +
>> + <register name="SO_WRITE_OFFSET3" length="1" num="0x528c">
>> + <field name="Write Offset" start="2" end="31" type="offset"/>
>> + </register>
>> +
>> </genxml>
>> diff --git a/src/intel/genxml/gen9.xml b/src/intel/genxml/gen9.xml
>> index 0dfce3f..3ddf63d 100644
>> --- a/src/intel/genxml/gen9.xml
>> +++ b/src/intel/genxml/gen9.xml
>> @@ -3449,4 +3449,20 @@
>> <field name="All Allocation" start="25" end="31"
type="uint"/>
>> </register>
>> + <register name="SO_WRITE_OFFSET0" length="1" num="0x5280">
>> + <field name="Write Offset" start="2" end="31" type="offset"/>
>> + </register>
>> +
>> + <register name="SO_WRITE_OFFSET1" length="1" num="0x5284">
>> + <field name="Write Offset" start="2" end="31" type="offset"/>
>> + </register>
>> +
>> + <register name="SO_WRITE_OFFSET2" length="1" num="0x5288">
>> + <field name="Write Offset" start="2" end="31" type="offset"/>
>> + </register>
>> +
>> + <register name="SO_WRITE_OFFSET3" length="1" num="0x528c">
>> + <field name="Write Offset" start="2" end="31" type="offset"/>
>> + </register>
>> +
>> </genxml>
>
>
>
_______________________________________________
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev
