---
src/mesa/drivers/dri/i965/blorp.c | 27 +--------------------------
src/mesa/drivers/dri/i965/blorp.h | 4 ++++
src/mesa/drivers/dri/i965/blorp_blit.c | 2 +-
src/mesa/drivers/dri/i965/blorp_clear.c | 6 +++---
src/mesa/drivers/dri/i965/blorp_priv.h | 21 ---------------------
src/mesa/drivers/dri/i965/brw_blorp.c | 19 +++++++++++++++++++
src/mesa/drivers/dri/i965/genX_blorp_exec.c | 9 +++++++--
7 files changed, 35 insertions(+), 53 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/blorp.c
b/src/mesa/drivers/dri/i965/blorp.c
index 0688f6b..df10e50 100644
--- a/src/mesa/drivers/dri/i965/blorp.c
+++ b/src/mesa/drivers/dri/i965/blorp.c
@@ -345,31 +345,6 @@ brw_blorp_compile_nir_shader(struct brw_context *brw,
struct nir_shader *nir,
}
void
-brw_blorp_exec(struct brw_context *brw, const struct brw_blorp_params *params)
-{
- switch (brw->gen) {
- case 6:
- gen6_blorp_exec(brw, params);
- break;
- case 7:
- if (brw->is_haswell)
- gen75_blorp_exec(brw, params);
- else
- gen7_blorp_exec(brw, params);
- break;
- case 8:
- gen8_blorp_exec(brw, params);
- break;
- case 9:
- gen9_blorp_exec(brw, params);
- break;
- default:
- /* BLORP is not supported before Gen6. */
- unreachable("not reached");
- }
-}
-
-void
blorp_gen6_hiz_op(struct brw_context *brw, struct brw_blorp_surf *surf,
unsigned level, unsigned layer, enum gen6_hiz_op op)
{
@@ -436,5 +411,5 @@ blorp_gen6_hiz_op(struct brw_context *brw, struct
brw_blorp_surf *surf,
unreachable("not reached");
}
- brw_blorp_exec(brw, ¶ms);
+ brw->blorp.exec(&brw->blorp, brw, ¶ms);
}
diff --git a/src/mesa/drivers/dri/i965/blorp.h
b/src/mesa/drivers/dri/i965/blorp.h
index a9ef754..671731e 100644
--- a/src/mesa/drivers/dri/i965/blorp.h
+++ b/src/mesa/drivers/dri/i965/blorp.h
@@ -39,6 +39,8 @@ struct hash_table;
extern "C" {
#endif
+struct brw_blorp_params;
+
struct blorp_context {
void *driver_ctx;
@@ -56,6 +58,8 @@ struct blorp_context {
uint32_t (*upload_shader)(struct blorp_context *,
const void *data, uint32_t size);
+ void (*exec)(struct blorp_context *blorp, void *batch,
+ const struct brw_blorp_params *params);
};
void blorp_init(struct blorp_context *blorp, void *driver_ctx,
diff --git a/src/mesa/drivers/dri/i965/blorp_blit.c
b/src/mesa/drivers/dri/i965/blorp_blit.c
index d01dfff..449e09d 100644
--- a/src/mesa/drivers/dri/i965/blorp_blit.c
+++ b/src/mesa/drivers/dri/i965/blorp_blit.c
@@ -1647,5 +1647,5 @@ brw_blorp_blit(struct brw_context *brw,
swizzle_to_scs(GET_SWZ(src_swizzle, i));
}
- brw_blorp_exec(brw, ¶ms);
+ brw->blorp.exec(&brw->blorp, brw, ¶ms);
}
diff --git a/src/mesa/drivers/dri/i965/blorp_clear.c
b/src/mesa/drivers/dri/i965/blorp_clear.c
index fb4d050..3b6d6d7 100644
--- a/src/mesa/drivers/dri/i965/blorp_clear.c
+++ b/src/mesa/drivers/dri/i965/blorp_clear.c
@@ -110,7 +110,7 @@ blorp_fast_clear(struct brw_context *brw, const struct
brw_blorp_surf *surf,
brw_blorp_surface_info_init(brw, ¶ms.dst, surf, level, layer,
surf->surf->format, true);
- brw_blorp_exec(brw, ¶ms);
+ brw->blorp.exec(&brw->blorp, brw, ¶ms);
}
@@ -156,7 +156,7 @@ blorp_clear(struct brw_context *brw, const struct
brw_blorp_surf *surf,
brw_blorp_surface_info_init(brw, ¶ms.dst, surf, level, layer,
format, true);
- brw_blorp_exec(brw, ¶ms);
+ brw->blorp.exec(&brw->blorp, brw, ¶ms);
}
void
@@ -186,5 +186,5 @@ brw_blorp_ccs_resolve(struct brw_context *brw, struct
brw_blorp_surf *surf,
brw_blorp_params_get_clear_kernel(brw, ¶ms, true);
- brw_blorp_exec(brw, ¶ms);
+ brw->blorp.exec(&brw->blorp, brw, ¶ms);
}
diff --git a/src/mesa/drivers/dri/i965/blorp_priv.h
b/src/mesa/drivers/dri/i965/blorp_priv.h
index 9b987a8..c7a2a03 100644
--- a/src/mesa/drivers/dri/i965/blorp_priv.h
+++ b/src/mesa/drivers/dri/i965/blorp_priv.h
@@ -183,27 +183,6 @@ struct brw_blorp_params
void
brw_blorp_params_init(struct brw_blorp_params *params);
-void
-brw_blorp_exec(struct brw_context *brw, const struct brw_blorp_params *params);
-
-void
-gen6_blorp_exec(struct brw_context *brw,
- const struct brw_blorp_params *params);
-
-void
-gen7_blorp_exec(struct brw_context *brw,
- const struct brw_blorp_params *params);
-
-void
-gen75_blorp_exec(struct brw_context *brw,
- const struct brw_blorp_params *params);
-
-void
-gen8_blorp_exec(struct brw_context *brw, const struct brw_blorp_params
*params);
-
-void
-gen9_blorp_exec(struct brw_context *brw, const struct brw_blorp_params
*params);
-
struct brw_blorp_blit_prog_key
{
/* Number of samples per pixel that have been configured in the surface
diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c
b/src/mesa/drivers/dri/i965/brw_blorp.c
index 26bf1aa..e4898a3 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.c
+++ b/src/mesa/drivers/dri/i965/brw_blorp.c
@@ -58,6 +58,17 @@ brw_blorp_upload_shader(struct blorp_context *blorp,
return kernel;
}
+void gen6_blorp_exec(struct blorp_context *blorp, void *batch,
+ const struct brw_blorp_params *params);
+void gen7_blorp_exec(struct blorp_context *blorp, void *batch,
+ const struct brw_blorp_params *params);
+void gen75_blorp_exec(struct blorp_context *blorp, void *batch,
+ const struct brw_blorp_params *params);
+void gen8_blorp_exec(struct blorp_context *blorp, void *batch,
+ const struct brw_blorp_params *params);
+void gen9_blorp_exec(struct blorp_context *blorp, void *batch,
+ const struct brw_blorp_params *params);
+
void
brw_blorp_init(struct brw_context *brw)
{
@@ -68,21 +79,29 @@ brw_blorp_init(struct brw_context *brw)
brw->blorp.mocs.tex = 0;
brw->blorp.mocs.rb = 0;
brw->blorp.mocs.vb = 0;
+ brw->blorp.exec = gen6_blorp_exec;
break;
case 7:
brw->blorp.mocs.tex = GEN7_MOCS_L3;
brw->blorp.mocs.rb = GEN7_MOCS_L3;
brw->blorp.mocs.vb = GEN7_MOCS_L3;
+ if (brw->is_haswell) {
+ brw->blorp.exec = gen75_blorp_exec;
+ } else {
+ brw->blorp.exec = gen7_blorp_exec;
+ }
break;
case 8:
brw->blorp.mocs.tex = BDW_MOCS_WB;
brw->blorp.mocs.rb = BDW_MOCS_PTE;
brw->blorp.mocs.vb = BDW_MOCS_WB;
+ brw->blorp.exec = gen8_blorp_exec;
break;
case 9:
brw->blorp.mocs.tex = SKL_MOCS_WB;
brw->blorp.mocs.rb = SKL_MOCS_PTE;
brw->blorp.mocs.vb = SKL_MOCS_WB;
+ brw->blorp.exec = gen9_blorp_exec;
break;
default:
unreachable("Invalid gen");
diff --git a/src/mesa/drivers/dri/i965/genX_blorp_exec.c
b/src/mesa/drivers/dri/i965/genX_blorp_exec.c
index 9ba1f8a..7390a1d 100644
--- a/src/mesa/drivers/dri/i965/genX_blorp_exec.c
+++ b/src/mesa/drivers/dri/i965/genX_blorp_exec.c
@@ -166,10 +166,15 @@ blorp_emit_3dstate_multisample(struct blorp_context
*blorp, void *batch,
#endif
}
+void genX(blorp_exec)(struct blorp_context *blorp, void *batch,
+ const struct brw_blorp_params *params);
+
void
-genX(blorp_exec)(struct brw_context *brw,
+genX(blorp_exec)(struct blorp_context *blorp, void *batch,
const struct brw_blorp_params *params)
{
+ assert(blorp->driver_ctx == batch);
+ struct brw_context *brw = batch;
struct gl_context *ctx = &brw->ctx;
const uint32_t estimated_max_batch_usage = GEN_GEN >= 8 ? 1800 : 1500;
bool check_aperture_failed_once = false;
@@ -208,7 +213,7 @@ retry:
brw_emit_depth_stall_flushes(brw);
- blorp_exec(&brw->blorp, brw, params);
+ blorp_exec(blorp, batch, params);
/* Make sure we didn't wrap the batch unintentionally, and make sure we
* reserved enough space that a wrap will never happen.
--
2.5.0.400.gff86faf
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