On Tue, Jul 26, 2016 at 10:04:21PM -0700, Jason Ekstrand wrote: > The real objective of this series is patch 5 which prevents us from > accidentally creating a surface state with a format unsupported by the > hardware. This turns some of the new Vulkan CTS tests from a hang into an > informative crash. In order to get there, however, we needed to update the > format table in isl with some of the new formats added on Haswell and later > generations. In order to do that, we had to fix up the dri driver, and own > the rabbit hole we go! >
Contrary to your introduction, I cannot see how patches 4 and 5 are dependent on patches 1-3. Could you please explain this further? - Nanley > At the end of the series, the hangs in the latest CTS are gone (they came > from trying to clear an unsupported image format). > > Jason Ekstrand (5): > i965/surface_formats: Don't advertise 8 or 16-bit RGB formats > isl/formats: Report ETC as being samplable on Bay Trail > isl/formats: Update the table with more samplable formats > anv/image: Don't create invalid render target surfaces > isl/state: Add some asserts about format capabilities > > src/intel/isl/isl_format.c | 48 > +++++++++++++++++-------- > src/intel/isl/isl_surface_state.c | 5 +++ > src/intel/vulkan/anv_image.c | 13 ++++++- > src/mesa/drivers/dri/i965/brw_surface_formats.c | 10 ++++++ > 4 files changed, 60 insertions(+), 16 deletions(-) > > -- > 2.5.0.400.gff86faf > > _______________________________________________ > mesa-dev mailing list > mesa-dev@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/mesa-dev _______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
