On Fri, May 27, 2016 at 11:24 AM, Jordan Justen <jordan.l.jus...@intel.com>
wrote:
> v2:
> * simd16/32 fixes (curro)
>
> Signed-off-by: Jordan Justen <jordan.l.jus...@intel.com>
> ---
> src/compiler/nir/nir_intrinsics.h | 1 +
> src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 15 +++++++++++++++
> 2 files changed, 16 insertions(+)
>
> diff --git a/src/compiler/nir/nir_intrinsics.h
> b/src/compiler/nir/nir_intrinsics.h
> index aeb6038..6f86c9f 100644
> --- a/src/compiler/nir/nir_intrinsics.h
> +++ b/src/compiler/nir/nir_intrinsics.h
> @@ -304,6 +304,7 @@ SYSTEM_VALUE(work_group_id, 3, 0, xx, xx, xx)
> SYSTEM_VALUE(user_clip_plane, 4, 1, UCP_ID, xx, xx)
> SYSTEM_VALUE(num_work_groups, 3, 0, xx, xx, xx)
> SYSTEM_VALUE(helper_invocation, 1, 0, xx, xx, xx)
> +SYSTEM_VALUE(channel_num, 1, 0, xx, xx, xx)
>
Might be good to make this channel_num_i965 since it is back-end specific.
>
> /*
> * Load operations pull data from some piece of GPU memory. All load
> diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
> b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
> index 954bfab..c9e4b3c 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
> @@ -3881,6 +3881,21 @@ fs_visitor::nir_emit_intrinsic(const fs_builder
> &bld, nir_intrinsic_instr *instr
> break;
> }
>
> + case nir_intrinsic_load_channel_num: {
> + fs_reg tmp = bld.vgrf(BRW_REGISTER_TYPE_UW);
> + dest = retype(dest, BRW_REGISTER_TYPE_UD);
> + const fs_builder allbld8 = bld.group(8, 0).exec_all();
> + allbld8.MOV(tmp, brw_imm_v(0x76543210));
> + if (dispatch_width > 8)
> + allbld8.ADD(byte_offset(tmp, 16), tmp, brw_imm_uw(8u));
> + if (dispatch_width > 16) {
> + const fs_builder allbld16 = bld.group(16, 0).exec_all();
> + allbld16.ADD(byte_offset(tmp, 32), tmp, brw_imm_uw(16u));
> + }
> + bld.MOV(dest, tmp);
> + break;
> + }
> +
> default:
> unreachable("unknown intrinsic");
> }
> --
> 2.8.1
>
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