Reviewed-by: Marek Olšák <marek.ol...@amd.com>
FYI, si_resource_copy_region does the reinterpretation for copying.
Marek
On Mon, Jan 18, 2016 at 11:22 PM, Nicolai Hähnle <nhaeh...@gmail.com> wrote:
> From: Nicolai Hähnle <nicolai.haeh...@amd.com>
>
> This is already used internally in the transfer_map implementation for
> compressed textures, so the only real change here is the adjusted surface
> size computation.
> ---
> src/gallium/drivers/r600/r600_pipe.c | 2 +-
> src/gallium/drivers/radeon/r600_texture.c | 26 +++++++++++++++++++++++---
> src/gallium/drivers/radeonsi/si_pipe.c | 2 +-
> 3 files changed, 25 insertions(+), 5 deletions(-)
>
> diff --git a/src/gallium/drivers/r600/r600_pipe.c
> b/src/gallium/drivers/r600/r600_pipe.c
> index 17140bb..f519916 100644
> --- a/src/gallium/drivers/r600/r600_pipe.c
> +++ b/src/gallium/drivers/r600/r600_pipe.c
> @@ -279,6 +279,7 @@ static int r600_get_param(struct pipe_screen* pscreen,
> enum pipe_cap param)
> case PIPE_CAP_TGSI_TXQS:
> case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
> case PIPE_CAP_INVALIDATE_BUFFER:
> + case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS:
> return 1;
>
> case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
> @@ -360,7 +361,6 @@ static int r600_get_param(struct pipe_screen* pscreen,
> enum pipe_cap param)
> case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
> case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
> case PIPE_CAP_GENERATE_MIPMAP:
> - case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS:
> return 0;
>
> case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
> diff --git a/src/gallium/drivers/radeon/r600_texture.c
> b/src/gallium/drivers/radeon/r600_texture.c
> index 7c4717d..aec7e32 100644
> --- a/src/gallium/drivers/radeon/r600_texture.c
> +++ b/src/gallium/drivers/radeon/r600_texture.c
> @@ -1212,10 +1212,30 @@ static struct pipe_surface
> *r600_create_surface(struct pipe_context *pipe,
> const struct pipe_surface
> *templ)
> {
> unsigned level = templ->u.tex.level;
> + unsigned width = u_minify(tex->width0, level);
> + unsigned height = u_minify(tex->height0, level);
> +
> + if (templ->format != tex->format) {
> + const struct util_format_description *tex_desc
> + = util_format_description(tex->format);
> + const struct util_format_description *templ_desc
> + = util_format_description(templ->format);
> +
> + assert(tex_desc->block.bits == templ_desc->block.bits);
> +
> + /* Adjust size of surface if and only if the block width or
> + * height is changed. */
> + if (tex_desc->block.width != templ_desc->block.width ||
> + tex_desc->block.height != templ_desc->block.height) {
> + unsigned nblks_x =
> util_format_get_nblocksx(tex->format, width);
> + unsigned nblks_y =
> util_format_get_nblocksy(tex->format, height);
> +
> + width = nblks_x * templ_desc->block.width;
> + height = nblks_y * templ_desc->block.height;
> + }
> + }
>
> - return r600_create_surface_custom(pipe, tex, templ,
> - u_minify(tex->width0, level),
> - u_minify(tex->height0, level));
> + return r600_create_surface_custom(pipe, tex, templ, width, height);
> }
>
> static void r600_surface_destroy(struct pipe_context *pipe,
> diff --git a/src/gallium/drivers/radeonsi/si_pipe.c
> b/src/gallium/drivers/radeonsi/si_pipe.c
> index 04e9d60..c50c707 100644
> --- a/src/gallium/drivers/radeonsi/si_pipe.c
> +++ b/src/gallium/drivers/radeonsi/si_pipe.c
> @@ -304,6 +304,7 @@ static int si_get_param(struct pipe_screen* pscreen, enum
> pipe_cap param)
> case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
> case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
> case PIPE_CAP_INVALIDATE_BUFFER:
> + case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS:
> return 1;
>
> case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
> @@ -352,7 +353,6 @@ static int si_get_param(struct pipe_screen* pscreen, enum
> pipe_cap param)
> case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
> case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
> case PIPE_CAP_GENERATE_MIPMAP:
> - case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS:
> return 0;
>
> case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
> --
> 2.5.0
>
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