Patch is:
Reviewed-by: Eduardo Lima Mitev <el...@igalia.com>
Thanks!
On 12/13/2015 01:12 AM, Jason Ekstrand wrote:
> Our hardware requires an LOD for all texelFetch commands even if they are
> on buffer textures. GLSL IR gives us an LOD of 0 in that case, but the LOD
> is really rather meaningless. This commit allows other NIR producers to be
> more lazy and not provide one at all.
> ---
> src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 4 ++++
> src/mesa/drivers/dri/i965/brw_vec4_nir.cpp | 4 ++++
> 2 files changed, 8 insertions(+)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
> b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
> index c52bc04..6f51ce1 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
> @@ -2780,6 +2780,10 @@ fs_visitor::nir_emit_texture(const fs_builder &bld,
> nir_tex_instr *instr)
>
> fs_reg coordinate, shadow_comparitor, lod, lod2, sample_index, mcs,
> tex_offset;
>
> + /* Our hardware requires a LOD for buffer textures */
> + if (instr->sampler_dim == GLSL_SAMPLER_DIM_BUF)
> + lod = brw_imm_d(0);
> +
> for (unsigned i = 0; i < instr->num_srcs; i++) {
> fs_reg src = get_nir_src(instr->src[i].src);
> switch (instr->src[i].src_type) {
> diff --git a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
> b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
> index cf1f82f..cfb66a5 100644
> --- a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
> @@ -1558,6 +1558,10 @@ vec4_visitor::nir_emit_texture(nir_tex_instr *instr)
> nir_tex_instr_dest_size(instr));
> dst_reg dest = get_nir_dest(instr->dest, instr->dest_type);
>
> + /* Our hardware requires a LOD for buffer textures */
> + if (instr->sampler_dim == GLSL_SAMPLER_DIM_BUF)
> + lod = brw_imm_d(0);
> +
> /* Load the texture operation sources */
> for (unsigned i = 0; i < instr->num_srcs; i++) {
> switch (instr->src[i].src_type) {
>
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