Most math operations are unary operations; prior to this patch, POW was
the only binary operation we supported. The next commit will introduce
integer quotient and remainder operations. To facilitate that, this
patch simply generalizes POW checks into two-operand checks.
Signed-off-by: Kenneth Graunke <kenn...@whitecape.org>
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 8 +++++++-
src/mesa/drivers/dri/i965/brw_fs_emit.cpp | 4 +++-
2 files changed, 10 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp
b/src/mesa/drivers/dri/i965/brw_fs.cpp
index e163d30..fd0d522 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -574,7 +574,13 @@ fs_visitor::emit_math(fs_opcodes opcode, fs_reg dst,
fs_reg src0, fs_reg src1)
int base_mrf = 2;
fs_inst *inst;
- assert(opcode == FS_OPCODE_POW);
+ switch (opcode) {
+ case FS_OPCODE_POW:
+ break;
+ default:
+ assert(!"not reached: unsupported binary math opcode");
+ return NULL;
+ }
if (intel->gen >= 6) {
/* Can't do hstride == 0 args to gen6 math, so expand it out.
diff --git a/src/mesa/drivers/dri/i965/brw_fs_emit.cpp
b/src/mesa/drivers/dri/i965/brw_fs_emit.cpp
index e168e54..679bf05 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_emit.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_emit.cpp
@@ -147,6 +147,7 @@ fs_visitor::generate_math(fs_inst *inst,
struct brw_reg dst, struct brw_reg *src)
{
int op;
+ int num_operands = 1;
switch (inst->opcode) {
case FS_OPCODE_RCP:
@@ -166,6 +167,7 @@ fs_visitor::generate_math(fs_inst *inst,
break;
case FS_OPCODE_POW:
op = BRW_MATH_FUNCTION_POW;
+ num_operands = 2;
break;
case FS_OPCODE_SIN:
op = BRW_MATH_FUNCTION_SIN;
@@ -182,7 +184,7 @@ fs_visitor::generate_math(fs_inst *inst,
if (intel->gen >= 6) {
assert(inst->mlen == 0);
- if (inst->opcode == FS_OPCODE_POW) {
+ if (num_operands == 2) {
brw_set_compression_control(p, BRW_COMPRESSION_NONE);
brw_math2(p, dst, op, src[0], src[1]);
--
1.7.6
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