On Feb 5, 2008, at 9:43 AM, Dale Johannesen wrote: > > On Feb 4, 2008, at 9:07 PM, Chris Lattner wrote: > >> >> On Feb 4, 2008, at 3:27 PM, Dale Johannesen wrote: >> >>> Author: johannes >>> Date: Mon Feb 4 17:27:29 2008 >>> New Revision: 46727 >>> >>> URL: http://llvm.org/viewvc/llvm-project?rev=46727&view=rev >>> Log: >>> Do not unconditionally redefine vec_ext_v16qi and >>> vec_ext_v4si builtins. This is a hack; they should >>> be defined here, then resolved in the X86 BE. >>> However there is enough other stuff missing in the >>> X86 BE for SSE41 that this will do for now. >> >> I think these are in the category of builtins that should be expanded >> by the FE, and thus should be removed. Nate, thoughts? >> >> -Chris > > That means you have to know whether you've got SSE4.1 in the FE. > This is not an insuperable obstacle, but I think it's better to leave > target > dependencies in the BE when possible.
Even with SSE4.1, it's a good idea to lower them to extract element instructions. X86ISelLoweringhas all the information necessary to determine what instructions to they should be selected to. Evan > > >>> Modified: >>> llvm/trunk/include/llvm/IntrinsicsX86.td >>> >>> Modified: llvm/trunk/include/llvm/IntrinsicsX86.td >>> URL: >>> http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/IntrinsicsX86.td?rev=46727&r1=46726&r2=46727&view=diff >>> >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> = >>> ==================================================================== >>> --- llvm/trunk/include/llvm/IntrinsicsX86.td (original) >>> +++ llvm/trunk/include/llvm/IntrinsicsX86.td Mon Feb 4 17:27:29 >>> 2008 >>> @@ -764,9 +764,9 @@ >>> >>> // Vector extract >>> let TargetPrefix = "x86" in { // All intrinsics start with >>> "llvm.x86.". >>> - def int_x86_sse41_pextrb : >>> GCCBuiltin<"__builtin_ia32_vec_ext_v16qi">, >>> + def int_x86_sse41_pextrb : >>> Intrinsic<[llvm_i32_ty, llvm_v16i8_ty, llvm_i32_ty]>; >>> - def int_x86_sse41_pextrd : >>> GCCBuiltin<"__builtin_ia32_vec_ext_v4si">, >>> + def int_x86_sse41_pextrd : >>> Intrinsic<[llvm_i32_ty, llvm_v4i32_ty, llvm_i32_ty]>; >>> def int_x86_sse41_pextrq : >>> GCCBuiltin<"__builtin_ia32_vec_ext_v2di">, >>> Intrinsic<[llvm_i64_ty, llvm_v2i64_ty, llvm_i32_ty]>; >>> >>> >>> _______________________________________________ >>> llvm-commits mailing list >>> llvm-commits@cs.uiuc.edu >>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits >> >> _______________________________________________ >> llvm-commits mailing list >> llvm-commits@cs.uiuc.edu >> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits > > _______________________________________________ > llvm-commits mailing list > llvm-commits@cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
