Author: lattner
Date: Mon Dec 31 20:55:32 2007
New Revision: 45479
URL: http://llvm.org/viewvc/llvm-project?rev=45479&view=rev
Log:
add efficient iteration support for register use/def's
within a machine function.
Modified:
llvm/trunk/include/llvm/CodeGen/MachineOperand.h
llvm/trunk/include/llvm/CodeGen/MachineRegisterInfo.h
Modified: llvm/trunk/include/llvm/CodeGen/MachineOperand.h
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineOperand.h?rev=45479&r1=45478&r2=45479&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/MachineOperand.h (original)
+++ llvm/trunk/include/llvm/CodeGen/MachineOperand.h Mon Dec 31 20:55:32 2007
@@ -175,6 +175,13 @@
assert(isRegister() && "Wrong MachineOperand accessor");
return IsKill;
}
+
+ /// getNextOperandForReg - Return the next MachineOperand in the function
that
+ /// uses or defines this register.
+ MachineOperand *getNextOperandForReg() const {
+ assert(isRegister() && "This is not a register operand!");
+ return Contents.Reg.Next;
+ }
//===--------------------------------------------------------------------===//
// Mutators for Register Operands
Modified: llvm/trunk/include/llvm/CodeGen/MachineRegisterInfo.h
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineRegisterInfo.h?rev=45479&r1=45478&r2=45479&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/MachineRegisterInfo.h (original)
+++ llvm/trunk/include/llvm/CodeGen/MachineRegisterInfo.h Mon Dec 31 20:55:32
2007
@@ -16,6 +16,7 @@
#include "llvm/Target/MRegisterInfo.h"
#include "llvm/ADT/BitVector.h"
+#include "llvm/ADT/iterator"
#include <vector>
namespace llvm {
@@ -56,6 +57,19 @@
MachineRegisterInfo(const MRegisterInfo &MRI);
~MachineRegisterInfo();
+
//===--------------------------------------------------------------------===//
+ // Register Info
+
//===--------------------------------------------------------------------===//
+
+ /// reg_begin/reg_end - Provide iteration support to walk over all
definitions
+ /// and uses of a register within the MachineFunction that corresponds to
this
+ /// MachineRegisterInfo object.
+ class reg_iterator;
+ reg_iterator reg_begin(unsigned RegNo) const {
+ return reg_iterator(getRegUseDefListHead(RegNo));
+ }
+ static reg_iterator reg_end() { return reg_iterator(0); }
+
/// getRegUseDefListHead - Return the head pointer for the register use/def
/// list for the specified virtual or physical register.
MachineOperand *&getRegUseDefListHead(unsigned RegNo) {
@@ -65,6 +79,12 @@
return VRegInfo[RegNo].second;
}
+ MachineOperand *getRegUseDefListHead(unsigned RegNo) const {
+ if (RegNo < MRegisterInfo::FirstVirtualRegister)
+ return PhysRegUseDefLists[RegNo];
+ RegNo -= MRegisterInfo::FirstVirtualRegister;
+ return VRegInfo[RegNo].second;
+ }
//===--------------------------------------------------------------------===//
// Virtual Register Info
@@ -141,6 +161,52 @@
bool liveout_empty() const { return LiveOuts.empty(); }
private:
void HandleVRegListReallocation();
+
+public:
+ /// reg_iterator - This class provides iterator support for machine
+ /// operands in the function that use or define a specific register.
+ class reg_iterator : public forward_iterator<MachineOperand, ptrdiff_t> {
+ typedef forward_iterator<MachineOperand, ptrdiff_t> super;
+
+ MachineOperand *Op;
+ reg_iterator(MachineOperand *op) : Op(op) {}
+ friend class MachineRegisterInfo;
+ public:
+ typedef super::reference reference;
+ typedef super::pointer pointer;
+
+ reg_iterator(const reg_iterator &I) : Op(I.Op) {}
+ reg_iterator() : Op(0) {}
+
+ bool operator==(const reg_iterator &x) const {
+ return Op == x.Op;
+ }
+ bool operator!=(const reg_iterator &x) const {
+ return !operator==(x);
+ }
+
+ /// atEnd - return true if this iterator is equal to reg_end() on the
value.
+ bool atEnd() const { return Op == 0; }
+
+ // Iterator traversal: forward iteration only
+ reg_iterator &operator++() { // Preincrement
+ assert(Op && "Cannot increment end iterator!");
+ Op = Op->getNextOperandForReg();
+ return *this;
+ }
+ reg_iterator operator++(int) { // Postincrement
+ reg_iterator tmp = *this; ++*this; return tmp;
+ }
+
+ // Retrieve a reference to the current operand.
+ MachineOperand &operator*() const {
+ assert(Op && "Cannot dereference end iterator!");
+ return *Op;
+ }
+
+ MachineOperand *operator->() const { return Op; }
+ };
+
};
} // End llvm namespace
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