On Jun 19, 2007, at 10:31 AM, Chris Lattner wrote: >>> It seems that simple remat works for things that: >>> >>> 1. have no side effects >>> 2. have no register inputs >>> >>> Is there another condition? >> >> Can't think of any. >> >>> >>> If so, simple remat can check #2 today, just by itself looking at >>> the >>> machineinstr. Given that, it comes down to how we want to >>> represent #1. >> >> I don't see a better way so I guess this will be a targetinstrinfo >> bit (true for those with side-effects). > > Okay, the tricky thing here is instructions that have "conditional > side effects". For example, all instructions marked isload/isstore/ > iscall etc should be considered to have side effects (as would > anything with implicit definitions), but loads from constant pools > and other special cases should not be considered to have side effects.
Calls should definitely be marked to have side-effects. To me the tricky cases are loads / stores. But can't we determine these from the operands? So, add one more condition: 3. if memory operation, no external symbol or global address inputs. Then we don't need to mark loads / stores as having side effects. Evan > > This sounds like the exact same class of problems we already have > with trivial remat :) > > -Chris > _______________________________________________ > llvm-commits mailing list > llvm-commits@cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits