Changes in directory llvm/lib/Target/ARM:
README.txt updated: 1.17 -> 1.18 --- Log message: Unfinished work and ideas related to register scavenger. --- Diffs of the changes: (+14 -0) README.txt | 14 ++++++++++++++ 1 files changed, 14 insertions(+) Index: llvm/lib/Target/ARM/README.txt diff -u llvm/lib/Target/ARM/README.txt:1.17 llvm/lib/Target/ARM/README.txt:1.18 --- llvm/lib/Target/ARM/README.txt:1.17 Fri Mar 9 13:18:59 2007 +++ llvm/lib/Target/ARM/README.txt Fri Mar 9 13:34:51 2007 @@ -427,6 +427,7 @@ http://citeseer.ist.psu.edu/debus04linktime.html //===---------------------------------------------------------------------===// + gcc generates smaller code for this function at -O2 or -Os: void foo(signed char* p) { @@ -449,3 +450,16 @@ each comparison, where there should be only one, and the condition codes are not remembered when the same two values are compared twice. +//===---------------------------------------------------------------------===// + +More register scavenging work: + +1. Use the register scavenger to track frame index materialized into registers + (those that do not fit in addressing modes) to allow reuse in the same BB. +2. Finish scavenging for Thumb. +3. We know some spills and restores are unnecessary. The issue is once live + intervals are merged, they are not never split. So every def is spilled + and every use requires a restore if the register allocator decides the + resulting live interval is not assigned a physical register. It may be + possible (with the help of the scavenger) to turn some spill / restore + pairs into register copies. _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
