Changes in directory llvm/lib/Target/ARM:
ARMRegisterInfo.td updated: 1.10 -> 1.11 --- Log message: Minor tweak. Allocate r0 to r3 in reverse order, r3 is least likely to be livein to a function. --- Diffs of the changes: (+5 -5) ARMRegisterInfo.td | 10 +++++----- 1 files changed, 5 insertions(+), 5 deletions(-) Index: llvm/lib/Target/ARM/ARMRegisterInfo.td diff -u llvm/lib/Target/ARM/ARMRegisterInfo.td:1.10 llvm/lib/Target/ARM/ARMRegisterInfo.td:1.11 --- llvm/lib/Target/ARM/ARMRegisterInfo.td:1.10 Mon Jan 29 16:23:02 2007 +++ llvm/lib/Target/ARM/ARMRegisterInfo.td Tue Feb 27 17:03:55 2007 @@ -101,31 +101,31 @@ let MethodBodies = [{ // FP is R11, R9 is available. static const unsigned ARM_GPR_AO_1[] = { - ARM::R0, ARM::R1, ARM::R2, ARM::R3, + ARM::R3, ARM::R2, ARM::R1, ARM::R0, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::LR, ARM::R11 }; // FP is R11, R9 is not available. static const unsigned ARM_GPR_AO_2[] = { - ARM::R0, ARM::R1, ARM::R2, ARM::R3, + ARM::R3, ARM::R2, ARM::R1, ARM::R0, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R10, ARM::LR, ARM::R11 }; // FP is R7, R9 is available. static const unsigned ARM_GPR_AO_3[] = { - ARM::R0, ARM::R1, ARM::R2, ARM::R3, + ARM::R3, ARM::R2, ARM::R1, ARM::R0, ARM::R4, ARM::R5, ARM::R6, ARM::R8, ARM::R9, ARM::R10,ARM::R11, ARM::LR, ARM::R7 }; // FP is R7, R9 is not available. static const unsigned ARM_GPR_AO_4[] = { - ARM::R0, ARM::R1, ARM::R2, ARM::R3, + ARM::R3, ARM::R2, ARM::R1, ARM::R0, ARM::R4, ARM::R5, ARM::R6, ARM::R8, ARM::R10,ARM::R11, ARM::LR, ARM::R7 }; // FP is R7, only low registers available. static const unsigned THUMB_GPR_AO[] = { - ARM::R0, ARM::R1, ARM::R2, + ARM::R2, ARM::R1, ARM::R0, ARM::R4, ARM::R5, ARM::R6, ARM::R7 }; GPRClass::iterator _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits