Changes in directory llvm/lib/Target/X86:
X86RegisterInfo.cpp updated: 1.202 -> 1.203 X86RegisterInfo.h updated: 1.47 -> 1.48 --- Log message: Re-apply my liveintervalanalysis changes. Now with PR1207: http://llvm.org/PR1207 fixes. --- Diffs of the changes: (+22 -0) X86RegisterInfo.cpp | 16 ++++++++++++++++ X86RegisterInfo.h | 6 ++++++ 2 files changed, 22 insertions(+) Index: llvm/lib/Target/X86/X86RegisterInfo.cpp diff -u llvm/lib/Target/X86/X86RegisterInfo.cpp:1.202 llvm/lib/Target/X86/X86RegisterInfo.cpp:1.203 --- llvm/lib/Target/X86/X86RegisterInfo.cpp:1.202 Sun Feb 18 21:20:00 2007 +++ llvm/lib/Target/X86/X86RegisterInfo.cpp Mon Feb 19 15:49:54 2007 @@ -31,6 +31,7 @@ #include "llvm/Target/TargetMachine.h" #include "llvm/Target/TargetOptions.h" #include "llvm/Support/CommandLine.h" +#include "llvm/ADT/BitVector.h" #include "llvm/ADT/STLExtras.h" using namespace llvm; @@ -883,6 +884,21 @@ return Is64Bit ? CalleeSavedRegClasses64Bit : CalleeSavedRegClasses32Bit; } +BitVector X86RegisterInfo::getReservedRegs(const MachineFunction &MF) const { + BitVector Reserved(getNumRegs()); + Reserved.set(X86::RSP); + Reserved.set(X86::ESP); + Reserved.set(X86::SP); + Reserved.set(X86::SPL); + if (hasFP(MF)) { + Reserved.set(X86::RBP); + Reserved.set(X86::EBP); + Reserved.set(X86::BP); + Reserved.set(X86::BPL); + } + return Reserved; +} + //===----------------------------------------------------------------------===// // Stack Frame Processing methods //===----------------------------------------------------------------------===// Index: llvm/lib/Target/X86/X86RegisterInfo.h diff -u llvm/lib/Target/X86/X86RegisterInfo.h:1.47 llvm/lib/Target/X86/X86RegisterInfo.h:1.48 --- llvm/lib/Target/X86/X86RegisterInfo.h:1.47 Sun Feb 18 21:20:00 2007 +++ llvm/lib/Target/X86/X86RegisterInfo.h Mon Feb 19 15:49:54 2007 @@ -78,6 +78,12 @@ /// length of this list match the getCalleeSavedRegs() list. const TargetRegisterClass* const* getCalleeSavedRegClasses() const; + /// getReservedRegs - Returns a bitset indexed by physical register number + /// indicating if a register is a special register that has particular uses and + /// should be considered unavailable at all times, e.g. SP, RA. This is used by + /// register scavenger to determine what registers are free. + BitVector getReservedRegs(const MachineFunction &MF) const; + bool hasFP(const MachineFunction &MF) const; void eliminateCallFramePseudoInstr(MachineFunction &MF, _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
