Changes in directory llvm/include/llvm/CodeGen:
LiveIntervalAnalysis.h updated: 1.70 -> 1.71 LiveVariables.h updated: 1.34 -> 1.35 MachineBasicBlock.h updated: 1.57 -> 1.58 MachineInstr.h updated: 1.211 -> 1.212 --- Log message: Re-apply my liveintervalanalysis changes. Now with PR1207: http://llvm.org/PR1207 fixes. --- Diffs of the changes: (+35 -9) LiveIntervalAnalysis.h | 18 ++++++++++++++++-- LiveVariables.h | 9 +++++---- MachineBasicBlock.h | 13 ++++++++++--- MachineInstr.h | 4 ++++ 4 files changed, 35 insertions(+), 9 deletions(-) Index: llvm/include/llvm/CodeGen/LiveIntervalAnalysis.h diff -u llvm/include/llvm/CodeGen/LiveIntervalAnalysis.h:1.70 llvm/include/llvm/CodeGen/LiveIntervalAnalysis.h:1.71 --- llvm/include/llvm/CodeGen/LiveIntervalAnalysis.h:1.70 Sun Feb 18 21:20:00 2007 +++ llvm/include/llvm/CodeGen/LiveIntervalAnalysis.h Mon Feb 19 15:49:53 2007 @@ -118,6 +118,11 @@ return I->second; } + bool hasInterval(unsigned reg) const { + Reg2IntervalMap::const_iterator I = r2iMap_.find(reg); + return I != r2iMap_.end(); + } + /// getMBBStartIdx - Return the base index of the first instruction in the /// specified MachineBasicBlock. unsigned getMBBStartIdx(MachineBasicBlock *MBB) const { @@ -189,6 +194,7 @@ /// copies that cannot yet be coallesced into the "TryAgain" list. void CopyCoallesceInMBB(MachineBasicBlock *MBB, std::vector<CopyRec> &TryAgain); + /// JoinCopy - Attempt to join intervals corresponding to SrcReg/DstReg, /// which are the src/dst of the copy instruction CopyMI. This returns true /// if the copy was successfully coallesced away, or if it is never possible @@ -233,6 +239,9 @@ LiveInterval &interval, unsigned SrcReg); + /// handleLiveInRegister - Create interval for a livein register. + void handleLiveInRegister(MachineBasicBlock* mbb, LiveInterval &interval); + /// Return true if the two specified registers belong to different /// register classes. The registers may be either phys or virt regs. bool differingRegisterClasses(unsigned RegA, unsigned RegB) const; @@ -241,11 +250,16 @@ bool AdjustCopiesBackFrom(LiveInterval &IntA, LiveInterval &IntB, MachineInstr *CopyMI); - bool overlapsAliases(const LiveInterval *lhs, - const LiveInterval *rhs) const; + /// hasRegisterUse - Returns true if there is any use of the specific + /// reg between indexes Start and End. + bool hasRegisterUse(unsigned Reg, unsigned Start, unsigned End); static LiveInterval createInterval(unsigned Reg); + void removeInterval(unsigned Reg) { + r2iMap_.erase(Reg); + } + LiveInterval &getOrCreateInterval(unsigned reg) { Reg2IntervalMap::iterator I = r2iMap_.find(reg); if (I == r2iMap_.end()) Index: llvm/include/llvm/CodeGen/LiveVariables.h diff -u llvm/include/llvm/CodeGen/LiveVariables.h:1.34 llvm/include/llvm/CodeGen/LiveVariables.h:1.35 --- llvm/include/llvm/CodeGen/LiveVariables.h:1.34 Sun Feb 18 21:20:00 2007 +++ llvm/include/llvm/CodeGen/LiveVariables.h Mon Feb 19 15:49:53 2007 @@ -36,6 +36,7 @@ namespace llvm { class MRegisterInfo; +class BitVector; class LiveVariables : public MachineFunctionPass { public: @@ -108,11 +109,11 @@ /// std::vector<VarInfo> VirtRegInfo; - /// AllocatablePhysicalRegisters - This vector keeps track of which registers - /// are actually register allocatable by the target machine. We can not track - /// liveness for values that are not in this set. + /// ReservedRegisters - This vector keeps track of which registers + /// are reserved register which are not allocatable by the target machine. + /// We can not track liveness for values that are in this set. /// - BitVector AllocatablePhysicalRegisters; + BitVector ReservedRegisters; private: // Intermediate data structures const MRegisterInfo *RegInfo; Index: llvm/include/llvm/CodeGen/MachineBasicBlock.h diff -u llvm/include/llvm/CodeGen/MachineBasicBlock.h:1.57 llvm/include/llvm/CodeGen/MachineBasicBlock.h:1.58 --- llvm/include/llvm/CodeGen/MachineBasicBlock.h:1.57 Sun Feb 18 21:20:00 2007 +++ llvm/include/llvm/CodeGen/MachineBasicBlock.h Mon Feb 19 15:49:53 2007 @@ -138,11 +138,18 @@ /// is an error to add the same register to the same set more than once. void addLiveIn(unsigned Reg) { LiveIns.push_back(Reg); } + /// removeLiveIn - Remove the specified register from the live in set. + /// + void removeLiveIn(unsigned Reg); + // Iteration support for live in sets. These sets are kept in sorted // order by their register number. - typedef std::vector<unsigned>::const_iterator livein_iterator; - livein_iterator livein_begin() const { return LiveIns.begin(); } - livein_iterator livein_end() const { return LiveIns.end(); } + typedef std::vector<unsigned>::iterator livein_iterator; + typedef std::vector<unsigned>::const_iterator const_livein_iterator; + livein_iterator livein_begin() { return LiveIns.begin(); } + const_livein_iterator livein_begin() const { return LiveIns.begin(); } + livein_iterator livein_end() { return LiveIns.end(); } + const_livein_iterator livein_end() const { return LiveIns.end(); } bool livein_empty() const { return LiveIns.empty(); } // Code Layout methods. Index: llvm/include/llvm/CodeGen/MachineInstr.h diff -u llvm/include/llvm/CodeGen/MachineInstr.h:1.211 llvm/include/llvm/CodeGen/MachineInstr.h:1.212 --- llvm/include/llvm/CodeGen/MachineInstr.h:1.211 Sun Feb 18 21:20:00 2007 +++ llvm/include/llvm/CodeGen/MachineInstr.h Mon Feb 19 15:49:53 2007 @@ -393,6 +393,10 @@ /// the specific register or NULL if it is not found. MachineOperand *findRegisterUseOperand(unsigned Reg); + /// findRegisterDefOperand() - Returns the MachineOperand that is a def of + /// the specific register or NULL if it is not found. + MachineOperand *findRegisterDefOperand(unsigned Reg); + /// copyKillDeadInfo - Copies kill / dead operand properties from MI. /// void copyKillDeadInfo(const MachineInstr *MI); _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
