Attached is a patch for the gcc/config/rs6000/rs6000.h file to remove
isSigned() calls. This is analgous to the last patch I sent but for PPC
instead of X86. Same comments
apply.
This patch has not been compiled or tested as I don't have a PPC
machine. Please review and try it.
Reid.
Index: gcc/config/rs6000/rs6000.h
===================================================================
--- gcc/config/rs6000/rs6000.h (revision 230)
+++ gcc/config/rs6000/rs6000.h (working copy)
@@ -3700,6 +3700,27 @@
((TY == Type::SByteTy) ? 'b' : \
((TY == Type::FloatTy) ? 'f' : 'x'))))
+/* LLVM_TARGET_INTRINSIC_CAST_RESULT - This macro just provides a frequently
+ * used sequence for use inside LLVM_TARGET_INTRINSIC_LOWER. Note that this
+ * macro assumes it is being invoked from inside LLVM_TARGET_INTRINSC_LOWER
+ * (see below) because it requires the "ResIsSigned" and "ExpIsSigned" macro
+ * arguments in order to derive signedness for the cast.
+ */
+#define LLVM_TARGET_INTRINSIC_CAST_RESULT(RESULT, RESISSIGNED, DESTTY, \
+ EXPISSIGNED) \
+ { Instruction::CastOps opcode = CastInst::getCastOpcode(RESULT, \
+ RESISSIGNED, DESTTY, EXPISSIGNED); \
+ RESULT = CastInst::create(opcode, RESULT, DESTTY, "tmp", CurBB); \
+ }
+
+/* LLVM_INTRINSIC_OP_IS_SIGNED - This macro determines if a given operand
+ * to the intrinsic is signed or not. Note that this macro assumes it is being
+ * invoked from inside LLVM_TARGET_INTRINSIC_LOWER (see below) because it
+ * requires the "exp" macro argument in order to determine signedness
+ */
+#define LLVM_INTRINSIC_OP_IS_SIGNED(EXP, OPNUM) \
+ !TYPE_UNSIGNED(TREE_TYPE(TREE_OPERAND(EXP, (OPNUM+1))))
+
/* LLVM_TARGET_INTRINSIC_LOWER - For builtins that we want to expand to normal
* LLVM code, emit the code now. If we can handle the code, this macro should
* emit the code, return true. Note that this would be much better as a
@@ -3854,22 +3875,22 @@
} \
return false; \
case ALTIVEC_BUILTIN_VPKUHUM: { \
- Instruction::CastOps opc = CastInst::getCastOpcode( \
- OPS[0], OPS[0]->getType()->isSigned(), DESTTY, DESTTY->isSigned()); \
+ Instruction::CastOps opc = CastInst::getCastOpcode(OPS[0], \
+ LLVM_INTRINSIC_OP_IS_SIGNED(EXP,0), DESTTY, EXPISSIGNED); \
OPS[0] = CastInst::create(opc, OPS[0], DESTTY, OPS[0]->getName(), CurBB); \
- opc = CastInst::getCastOpcode( \
- OPS[1], OPS[1]->getType()->isSigned(), DESTTY, DESTTY->isSigned()); \
+ opc = CastInst::getCastOpcode(OPS[1], \
+ LLVM_INTRINSIC_OP_IS_SIGNED(EXP,1), DESTTY, EXPISSIGNED); \
OPS[1] = CastInst::create(opc, OPS[1], DESTTY, OPS[0]->getName(), CurBB); \
RESULT = BuildVectorShuffle(OPS[0], OPS[1], 1, 3, 5, 7, 9, 11, 13, 15, \
17, 19, 21, 23, 25, 27, 29, 31); \
return true; \
} \
case ALTIVEC_BUILTIN_VPKUWUM: { \
- Instruction::CastOps opc = CastInst::getCastOpcode( \
- OPS[0], OPS[0]->getType()->isSigned(), DESTTY, DESTTY->isSigned()); \
+ Instruction::CastOps opc = CastInst::getCastOpcode(OPS[0], \
+ LLVM_INTRINSIC_OP_IS_SIGNED(EXP,0), DESTTY, EXPISSIGNED); \
OPS[0] = CastInst::create(opc, OPS[0], DESTTY, OPS[0]->getName(), CurBB); \
- opc = CastInst::getCastOpcode( \
- OPS[1], OPS[1]->getType()->isSigned(), DESTTY, DESTTY->isSigned()); \
+ opc = CastInst::getCastOpcode(OPS[1] \
+ LLVM_INTRINSIC_OP_IS_SIGNED(EXP,1), DESTTY, EXPISSIGNED): \
OPS[1] = CastInst::create(opc, OPS[1], DESTTY, OPS[0]->getName(), CurBB); \
RESULT = BuildVectorShuffle(OPS[0], OPS[1], 1, 3, 5, 7, 9, 11, 13, 15); \
return true; \
@@ -3903,9 +3924,7 @@
Constant *C = ConstantInt::get(Type::IntTy, 0x7FFFFFFF); \
C = ConstantPacked::get(std::vector<Constant*>(4, C)); \
RESULT = BinaryOperator::createAnd(OPS[0], C, "tmp", CurBB); \
- Instruction::CastOps opcode = CastInst::getCastOpcode( \
- RESULT, RESULT->getType()->isSigned(), DESTTY, DESTTY->isSigned()); \
- RESULT = CastInst::create(opcode, RESULT, DESTTY, "tmp", CurBB); \
+ LLVM_TARGET_INTRINSIC_CAST_RESULT(RESULT,RESISSIGNED,DESTTY,EXPISSIGNED); \
return true; \
} \
case ALTIVEC_BUILTIN_ABS_V4SI: \
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