Changes in directory llvm/lib/CodeGen/SelectionDAG:
LegalizeDAG.cpp updated: 1.417 -> 1.418
---
Log message:
If a brcond condition is promoted, make sure to zero extend it, even if not
expanded into BR_CC.
---
Diffs of the changes: (+6 -6)
LegalizeDAG.cpp | 12 ++++++------
1 files changed, 6 insertions(+), 6 deletions(-)
Index: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.417
llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.418
--- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.417 Mon Nov 6 22:11:44 2006
+++ llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Sun Nov 26 22:39:56 2006
@@ -1302,6 +1302,12 @@
break;
case Promote:
Tmp2 = PromoteOp(Node->getOperand(1)); // Promote the condition.
+
+ // The top bits of the promoted condition are not necessarily zero,
ensure
+ // that the value is properly zero extended.
+ if (!TLI.MaskedValueIsZero(Tmp2,
+ MVT::getIntVTBitMask(Tmp2.getValueType())^1))
+ Tmp2 = DAG.getZeroExtendInReg(Tmp2, MVT::i1);
break;
}
@@ -1323,12 +1329,6 @@
Tmp2.getOperand(0), Tmp2.getOperand(1),
Node->getOperand(2));
} else {
- // Make sure the condition is either zero or one. It may have been
- // promoted from something else.
- unsigned NumBits = MVT::getSizeInBits(Tmp2.getValueType());
- if (!TLI.MaskedValueIsZero(Tmp2, (~0ULL >> (64-NumBits))^1))
- Tmp2 = DAG.getZeroExtendInReg(Tmp2, MVT::i1);
-
Result = DAG.getNode(ISD::BR_CC, MVT::Other, Tmp1,
DAG.getCondCode(ISD::SETNE), Tmp2,
DAG.getConstant(0, Tmp2.getValueType()),
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