[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

[Evan Cheng]

Changes in directory llvm/lib/CodeGen/SelectionDAG:

DAGCombiner.cpp updated: 1.244 -> 1.245
---
Log message:

getPostIndexedAddressParts change: passes in load/store instead of its loaded / 
stored VT.

---
Diffs of the changes:  (+1 -3)

 DAGCombiner.cpp |    4 +---
 1 files changed, 1 insertion(+), 3 deletions(-)


Index: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.244 
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.245
--- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.244 Wed Nov  8 14:27:27 2006
+++ llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp       Wed Nov  8 22:29:46 2006
@@ -282,10 +282,8 @@
       MVT::ValueType VT;
       if (LoadSDNode *LD  = dyn_cast<LoadSDNode>(N)) {
         Ptr = LD->getBasePtr();
-        VT  = LD->getLoadedVT();
       } else if (StoreSDNode *ST  = dyn_cast<StoreSDNode>(N)) {
         Ptr = ST->getBasePtr();
-        VT  = ST->getStoredVT();
         isLoad = false;
       } else
         return false;
@@ -301,7 +299,7 @@
           SDOperand BasePtr;
           SDOperand Offset;
           ISD::MemOpAddrMode AM = ISD::UNINDEXED;
-          if (TLI.getPostIndexedAddressParts(Op, VT, BasePtr, Offset, AM,DAG)) 
{
+          if (TLI.getPostIndexedAddressParts(N, Op, BasePtr, Offset, AM,DAG)) {
             if (Ptr == Offset)
               std::swap(BasePtr, Offset);
             if (Ptr != BasePtr)



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