Changes in directory llvm/lib/Target/PowerPC:
PPCISelLowering.cpp updated: 1.215 -> 1.216 PPCISelLowering.h updated: 1.52 -> 1.53 --- Log message: Change the prototype for TargetLowering::isOperandValidForConstraint --- Diffs of the changes: (+20 -12) PPCISelLowering.cpp | 29 ++++++++++++++++++----------- PPCISelLowering.h | 3 ++- 2 files changed, 20 insertions(+), 12 deletions(-) Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp diff -u llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.215 llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.216 --- llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.215 Mon Oct 30 02:02:39 2006 +++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp Tue Oct 31 13:40:43 2006 @@ -2658,8 +2658,8 @@ } // isOperandValidForConstraint -bool PPCTargetLowering:: -isOperandValidForConstraint(SDOperand Op, char Letter) { +SDOperand PPCTargetLowering:: +isOperandValidForConstraint(SDOperand Op, char Letter, SelectionDAG &DAG) { switch (Letter) { default: break; case 'I': @@ -2670,32 +2670,39 @@ case 'N': case 'O': case 'P': { - if (!isa<ConstantSDNode>(Op)) return false; // Must be an immediate. + if (!isa<ConstantSDNode>(Op)) return SDOperand(0,0);// Must be an immediate. unsigned Value = cast<ConstantSDNode>(Op)->getValue(); switch (Letter) { default: assert(0 && "Unknown constraint letter!"); case 'I': // "I" is a signed 16-bit constant. - return (short)Value == (int)Value; + if ((short)Value == (int)Value) return Op; + break; case 'J': // "J" is a constant with only the high-order 16 bits nonzero. case 'L': // "L" is a signed 16-bit constant shifted left 16 bits. - return (short)Value == 0; + if ((short)Value == 0) return Op; + break; case 'K': // "K" is a constant with only the low-order 16 bits nonzero. - return (Value >> 16) == 0; + if ((Value >> 16) == 0) return Op; + break; case 'M': // "M" is a constant that is greater than 31. - return Value > 31; + if (Value > 31) return Op; + break; case 'N': // "N" is a positive constant that is an exact power of two. - return (int)Value > 0 && isPowerOf2_32(Value); + if ((int)Value > 0 && isPowerOf2_32(Value)) return Op; + break; case 'O': // "O" is the constant zero. - return Value == 0; + if (Value == 0) return Op; + break; case 'P': // "P" is a constant whose negation is a signed 16-bit constant. - return (short)-Value == (int)-Value; + if ((short)-Value == (int)-Value) return Op; + break; } break; } } // Handle standard constraint letters. - return TargetLowering::isOperandValidForConstraint(Op, Letter); + return TargetLowering::isOperandValidForConstraint(Op, Letter, DAG); } /// isLegalAddressImmediate - Return true if the integer value can be used Index: llvm/lib/Target/PowerPC/PPCISelLowering.h diff -u llvm/lib/Target/PowerPC/PPCISelLowering.h:1.52 llvm/lib/Target/PowerPC/PPCISelLowering.h:1.53 --- llvm/lib/Target/PowerPC/PPCISelLowering.h:1.52 Sun Aug 27 20:02:49 2006 +++ llvm/lib/Target/PowerPC/PPCISelLowering.h Tue Oct 31 13:40:43 2006 @@ -194,7 +194,8 @@ std::vector<unsigned> getRegClassForInlineAsmConstraint(const std::string &Constraint, MVT::ValueType VT) const; - bool isOperandValidForConstraint(SDOperand Op, char ConstraintLetter); + SDOperand isOperandValidForConstraint(SDOperand Op, char ConstraintLetter, + SelectionDAG &DAG); /// isLegalAddressImmediate - Return true if the integer value can be used /// as the offset of the target addressing mode. _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits