Changes in directory llvm/lib/Target/PowerPC:
PPCISelLowering.cpp updated: 1.219 -> 1.220 PPCISelLowering.h updated: 1.55 -> 1.56 --- Log message: Rename ISD::MemOpAddrMode to ISD::MemIndexedMode --- Diffs of the changes: (+2 -2) PPCISelLowering.cpp | 2 +- PPCISelLowering.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp diff -u llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.219 llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.220 --- llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.219 Tue Nov 7 20:15:41 2006 +++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp Thu Nov 9 11:55:04 2006 @@ -853,7 +853,7 @@ /// can be legally represented as pre-indexed load / store address. bool PPCTargetLowering::getPreIndexedAddressParts(SDNode *N, SDOperand &Base, SDOperand &Offset, - ISD::MemOpAddrMode &AM, + ISD::MemIndexedMode &AM, SelectionDAG &DAG) { return false; Index: llvm/lib/Target/PowerPC/PPCISelLowering.h diff -u llvm/lib/Target/PowerPC/PPCISelLowering.h:1.55 llvm/lib/Target/PowerPC/PPCISelLowering.h:1.56 --- llvm/lib/Target/PowerPC/PPCISelLowering.h:1.55 Tue Nov 7 20:15:41 2006 +++ llvm/lib/Target/PowerPC/PPCISelLowering.h Thu Nov 9 11:55:04 2006 @@ -182,7 +182,7 @@ /// can be legally represented as pre-indexed load / store address. virtual bool getPreIndexedAddressParts(SDNode *N, SDOperand &Base, SDOperand &Offset, - ISD::MemOpAddrMode &AM, + ISD::MemIndexedMode &AM, SelectionDAG &DAG); /// SelectAddressRegReg - Given the specified addressed, check to see if it _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits