Changes in directory llvm/lib/Target/IA64:
IA64ISelDAGToDAG.cpp updated: 1.57 -> 1.58
IA64ISelLowering.cpp updated: 1.46 -> 1.47
---
Log message:
Merge ISD::TRUNCSTORE to ISD::STORE. Switch to using StoreSDNode.
---
Diffs of the changes: (+12 -12)
IA64ISelDAGToDAG.cpp | 14 +++++++-------
IA64ISelLowering.cpp | 10 +++++-----
2 files changed, 12 insertions(+), 12 deletions(-)
Index: llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp
diff -u llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp:1.57
llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp:1.58
--- llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp:1.57 Wed Oct 11 02:10:22 2006
+++ llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp Fri Oct 13 16:14:26 2006
@@ -493,15 +493,15 @@
Address, Chain);
}
- case ISD::TRUNCSTORE:
case ISD::STORE: {
- SDOperand Address = N->getOperand(2);
- SDOperand Chain = N->getOperand(0);
+ StoreSDNode *ST = cast<StoreSDNode>(N);
+ SDOperand Address = ST->getBasePtr();
+ SDOperand Chain = ST->getChain();
AddToISelQueue(Address);
AddToISelQueue(Chain);
unsigned Opc;
- if (N->getOpcode() == ISD::STORE) {
+ if (ISD::isNON_TRUNCStore(N)) {
switch (N->getOperand(1).getValueType()) {
default: assert(0 && "unknown type in store");
case MVT::i1: { // this is a bool
@@ -510,7 +510,7 @@
SDOperand Initial = CurDAG->getCopyFromReg(Chain, IA64::r0, MVT::i64);
Chain = Initial.getValue(1);
// then load 1 into the same reg iff the predicate to store is 1
- SDOperand Tmp = N->getOperand(1);
+ SDOperand Tmp = ST->getValue();
AddToISelQueue(Tmp);
Tmp = SDOperand(CurDAG->getTargetNode(IA64::TPCADDS, MVT::i64, Initial,
CurDAG->getConstant(1, MVT::i64),
@@ -520,8 +520,8 @@
case MVT::i64: Opc = IA64::ST8; break;
case MVT::f64: Opc = IA64::STF8; break;
}
- } else { //ISD::TRUNCSTORE
- switch(cast<VTSDNode>(N->getOperand(4))->getVT()) {
+ } else { // Truncating store
+ switch(ST->getStoredVT()) {
default: assert(0 && "unknown type in truncstore");
case MVT::i8: Opc = IA64::ST1; break;
case MVT::i16: Opc = IA64::ST2; break;
Index: llvm/lib/Target/IA64/IA64ISelLowering.cpp
diff -u llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.46
llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.47
--- llvm/lib/Target/IA64/IA64ISelLowering.cpp:1.46 Mon Oct 9 15:57:25 2006
+++ llvm/lib/Target/IA64/IA64ISelLowering.cpp Fri Oct 13 16:14:26 2006
@@ -331,7 +331,7 @@
Chain = DAG.getCALLSEQ_START(Chain,DAG.getConstant(NumBytes,
getPointerTy()));
- SDOperand StackPtr, NullSV;
+ SDOperand StackPtr;
std::vector<SDOperand> Stores;
std::vector<SDOperand> Converts;
std::vector<SDOperand> RegValuesToPass;
@@ -383,11 +383,10 @@
if(ValToStore.Val) {
if(!StackPtr.Val) {
StackPtr = DAG.getRegister(IA64::r12, MVT::i64);
- NullSV = DAG.getSrcValue(NULL);
}
SDOperand PtrOff = DAG.getConstant(ArgOffset, getPointerTy());
PtrOff = DAG.getNode(ISD::ADD, MVT::i64, StackPtr, PtrOff);
- Stores.push_back(DAG.getStore(Chain, ValToStore, PtrOff, NullSV));
+ Stores.push_back(DAG.getStore(Chain, ValToStore, PtrOff, NULL, 0));
ArgOffset += ObjSize;
}
@@ -592,7 +591,7 @@
VT));
// Store the incremented VAList to the legalized pointer
VAIncr = DAG.getStore(VAList.getValue(1), VAIncr,
- Op.getOperand(1), Op.getOperand(2));
+ Op.getOperand(1), SV->getValue(), SV->getOffset());
// Load the actual argument out of the pointer VAList
return DAG.getLoad(Op.getValueType(), VAIncr, VAList, NULL, 0);
}
@@ -600,8 +599,9 @@
// vastart just stores the address of the VarArgsFrameIndex slot into the
// memory location argument.
SDOperand FR = DAG.getFrameIndex(VarArgsFrameIndex, MVT::i64);
+ SrcValueSDNode *SV = cast<SrcValueSDNode>(Op.getOperand(2));
return DAG.getStore(Op.getOperand(0), FR,
- Op.getOperand(1), Op.getOperand(2));
+ Op.getOperand(1), SV->getValue(), SV->getOffset());
}
}
}
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