Changes in directory llvm/lib/Target/Sparc:
SparcISelDAGToDAG.cpp updated: 1.111 -> 1.112
SparcInstrInfo.td updated: 1.130 -> 1.131
---
Log message:
Merge ISD::TRUNCSTORE to ISD::STORE. Switch to using StoreSDNode.
---
Diffs of the changes: (+12 -13)
SparcISelDAGToDAG.cpp | 13 ++++++-------
SparcInstrInfo.td | 12 ++++++------
2 files changed, 12 insertions(+), 13 deletions(-)
Index: llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp
diff -u llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp:1.111
llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp:1.112
--- llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp:1.111 Mon Oct 9 15:57:25 2006
+++ llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp Fri Oct 13 16:14:26 2006
@@ -436,8 +436,7 @@
int FrameIdx = MF.getFrameInfo()->CreateFixedObject(4, ArgOffset);
SDOperand FIPtr = DAG.getFrameIndex(FrameIdx, MVT::i32);
- OutChains.push_back(DAG.getStore(DAG.getRoot(),
- Arg, FIPtr, DAG.getSrcValue(0)));
+ OutChains.push_back(DAG.getStore(DAG.getRoot(), Arg, FIPtr, NULL, 0));
ArgOffset += 4;
}
}
@@ -504,7 +503,7 @@
Chain = DAG.getCALLSEQ_START(Chain,DAG.getConstant(ArgsSize,
getPointerTy()));
- SDOperand StackPtr, NullSV;
+ SDOperand StackPtr;
std::vector<SDOperand> Stores;
std::vector<SDOperand> RegValuesToPass;
unsigned ArgOffset = 68;
@@ -584,11 +583,10 @@
if (ValToStore.Val) {
if (!StackPtr.Val) {
StackPtr = DAG.getRegister(SP::O6, MVT::i32);
- NullSV = DAG.getSrcValue(NULL);
}
SDOperand PtrOff = DAG.getConstant(ArgOffset, getPointerTy());
PtrOff = DAG.getNode(ISD::ADD, MVT::i32, StackPtr, PtrOff);
- Stores.push_back(DAG.getStore(Chain, ValToStore, PtrOff, NullSV));
+ Stores.push_back(DAG.getStore(Chain, ValToStore, PtrOff, NULL, 0));
}
ArgOffset += ObjSize;
}
@@ -785,8 +783,9 @@
SDOperand Offset = DAG.getNode(ISD::ADD, MVT::i32,
DAG.getRegister(SP::I6, MVT::i32),
DAG.getConstant(VarArgsFrameOffset, MVT::i32));
+ SrcValueSDNode *SV = cast<SrcValueSDNode>(Op.getOperand(2));
return DAG.getStore(Op.getOperand(0), Offset,
- Op.getOperand(1), Op.getOperand(2));
+ Op.getOperand(1), SV->getValue(), SV->getOffset());
}
case ISD::VAARG: {
SDNode *Node = Op.Val;
@@ -802,7 +801,7 @@
getPointerTy()));
// Store the incremented VAList to the legalized pointer
InChain = DAG.getStore(VAList.getValue(1), NextPtr,
- VAListPtr, Node->getOperand(2));
+ VAListPtr, SV->getValue(), SV->getOffset());
// Load the actual argument out of the pointer VAList, unless this is an
// f64 load.
if (VT != MVT::f64) {
Index: llvm/lib/Target/Sparc/SparcInstrInfo.td
diff -u llvm/lib/Target/Sparc/SparcInstrInfo.td:1.130
llvm/lib/Target/Sparc/SparcInstrInfo.td:1.131
--- llvm/lib/Target/Sparc/SparcInstrInfo.td:1.130 Thu Oct 12 12:57:58 2006
+++ llvm/lib/Target/Sparc/SparcInstrInfo.td Fri Oct 13 16:14:26 2006
@@ -338,19 +338,19 @@
def STBrr : F3_1<3, 0b000101,
(ops MEMrr:$addr, IntRegs:$src),
"stb $src, [$addr]",
- [(truncstore IntRegs:$src, ADDRrr:$addr, i8)]>;
+ [(truncstorei8 IntRegs:$src, ADDRrr:$addr)]>;
def STBri : F3_2<3, 0b000101,
(ops MEMri:$addr, IntRegs:$src),
"stb $src, [$addr]",
- [(truncstore IntRegs:$src, ADDRri:$addr, i8)]>;
+ [(truncstorei8 IntRegs:$src, ADDRri:$addr)]>;
def STHrr : F3_1<3, 0b000110,
(ops MEMrr:$addr, IntRegs:$src),
"sth $src, [$addr]",
- [(truncstore IntRegs:$src, ADDRrr:$addr, i16)]>;
+ [(truncstorei16 IntRegs:$src, ADDRrr:$addr)]>;
def STHri : F3_2<3, 0b000110,
(ops MEMri:$addr, IntRegs:$src),
"sth $src, [$addr]",
- [(truncstore IntRegs:$src, ADDRri:$addr, i16)]>;
+ [(truncstorei16 IntRegs:$src, ADDRri:$addr)]>;
def STrr : F3_1<3, 0b000100,
(ops MEMrr:$addr, IntRegs:$src),
"st $src, [$addr]",
@@ -772,7 +772,7 @@
def : Pat<(i32 (zextloadi1 ADDRri:$src)), (LDUBri ADDRri:$src)>;
// truncstore bool -> truncstore byte.
-def : Pat<(truncstore IntRegs:$src, ADDRrr:$addr, i1),
+def : Pat<(truncstorei1 IntRegs:$src, ADDRrr:$addr),
(STBrr ADDRrr:$addr, IntRegs:$src)>;
-def : Pat<(truncstore IntRegs:$src, ADDRri:$addr, i1),
+def : Pat<(truncstorei1 IntRegs:$src, ADDRri:$addr),
(STBri ADDRri:$addr, IntRegs:$src)>;
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