Changes in directory llvm/lib/Target/ARM:
ARMMul.cpp added (r1.1) ARM.h updated: 1.5 -> 1.6 ARMTargetMachine.cpp updated: 1.9 -> 1.10 ARMTargetMachine.h updated: 1.5 -> 1.6 --- Log message: Implement a MachineFunctionPass to fix the mul instruction --- Diffs of the changes: (+74 -1) ARM.h | 1 ARMMul.cpp | 66 +++++++++++++++++++++++++++++++++++++++++++++++++++ ARMTargetMachine.cpp | 7 ++++- ARMTargetMachine.h | 1 4 files changed, 74 insertions(+), 1 deletion(-) Index: llvm/lib/Target/ARM/ARMMul.cpp diff -c /dev/null llvm/lib/Target/ARM/ARMMul.cpp:1.1 *** /dev/null Tue Sep 19 10:49:35 2006 --- llvm/lib/Target/ARM/ARMMul.cpp Tue Sep 19 10:49:24 2006 *************** *** 0 **** --- 1,66 ---- + //===-- ARMTargetMachine.cpp - Define TargetMachine for ARM ---------------===// + // + // The LLVM Compiler Infrastructure + // + // This file was developed by the "Instituto Nokia de Tecnologia" and + // is distributed under the University of Illinois Open Source + // License. See LICENSE.TXT for details. + // + //===----------------------------------------------------------------------===// + // + // + //===----------------------------------------------------------------------===// + + + #include "ARM.h" + #include "llvm/CodeGen/MachineInstrBuilder.h" + #include "llvm/CodeGen/MachineFunctionPass.h" + #include "llvm/Support/Compiler.h" + + using namespace llvm; + + namespace { + class VISIBILITY_HIDDEN FixMul : public MachineFunctionPass { + virtual bool runOnMachineFunction(MachineFunction &MF); + }; + } + + FunctionPass *llvm::createARMFixMulPass() { return new FixMul(); } + + bool FixMul::runOnMachineFunction(MachineFunction &MF) { + bool Changed = false; + + for (MachineFunction::iterator BB = MF.begin(), E = MF.end(); + BB != E; ++BB) { + MachineBasicBlock &MBB = *BB; + + for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end(); + I != E; ++I) { + MachineInstr *MI = I; + + if (MI->getOpcode() == ARM::MUL) { + MachineOperand &RdOp = MI->getOperand(0); + MachineOperand &RmOp = MI->getOperand(1); + MachineOperand &RsOp = MI->getOperand(2); + + unsigned Rd = RdOp.getReg(); + unsigned Rm = RmOp.getReg(); + unsigned Rs = RsOp.getReg(); + + if(Rd == Rm) { + Changed = true; + if (Rd != Rs) { + RmOp.setReg(Rs); + RsOp.setReg(Rm); + } else { + BuildMI(MBB, I, ARM::MOV, 3, ARM::R12).addReg(Rm).addImm(0) + .addImm(ARMShift::LSL); + RmOp.setReg(ARM::R12); + } + } + } + } + } + + return Changed; + } Index: llvm/lib/Target/ARM/ARM.h diff -u llvm/lib/Target/ARM/ARM.h:1.5 llvm/lib/Target/ARM/ARM.h:1.6 --- llvm/lib/Target/ARM/ARM.h:1.5 Wed Sep 13 07:09:43 2006 +++ llvm/lib/Target/ARM/ARM.h Tue Sep 19 10:49:24 2006 @@ -77,6 +77,7 @@ FunctionPass *createARMISelDag(TargetMachine &TM); FunctionPass *createARMCodePrinterPass(std::ostream &OS, TargetMachine &TM); + FunctionPass *createARMFixMulPass(); } // end namespace llvm; // Defines symbolic names for ARM registers. This defines a mapping from Index: llvm/lib/Target/ARM/ARMTargetMachine.cpp diff -u llvm/lib/Target/ARM/ARMTargetMachine.cpp:1.9 llvm/lib/Target/ARM/ARMTargetMachine.cpp:1.10 --- llvm/lib/Target/ARM/ARMTargetMachine.cpp:1.9 Thu Sep 7 18:39:26 2006 +++ llvm/lib/Target/ARM/ARMTargetMachine.cpp Tue Sep 19 10:49:24 2006 @@ -54,10 +54,15 @@ PM.add(createARMISelDag(*this)); return false; } + +bool ARMTargetMachine::addPostRegAlloc(FunctionPassManager &PM, bool Fast) { + PM.add(createARMFixMulPass()); + return true; +} + bool ARMTargetMachine::addAssemblyEmitter(FunctionPassManager &PM, bool Fast, std::ostream &Out) { // Output assembly language. PM.add(createARMCodePrinterPass(Out, *this)); return false; } - Index: llvm/lib/Target/ARM/ARMTargetMachine.h diff -u llvm/lib/Target/ARM/ARMTargetMachine.h:1.5 llvm/lib/Target/ARM/ARMTargetMachine.h:1.6 --- llvm/lib/Target/ARM/ARMTargetMachine.h:1.5 Thu Sep 7 18:39:26 2006 +++ llvm/lib/Target/ARM/ARMTargetMachine.h Tue Sep 19 10:49:24 2006 @@ -46,6 +46,7 @@ // Pass Pipeline Configuration virtual bool addInstSelector(FunctionPassManager &PM, bool Fast); + virtual bool addPostRegAlloc(FunctionPassManager &PM, bool Fast); virtual bool addAssemblyEmitter(FunctionPassManager &PM, bool Fast, std::ostream &Out); }; _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits