Changes in directory llvm/utils/TableGen:
InstrInfoEmitter.cpp updated: 1.43 -> 1.44 RegisterInfoEmitter.cpp updated: 1.47 -> 1.48 --- Log message: Use an enumeration to eliminate data relocations. --- Diffs of the changes: (+12 -2) InstrInfoEmitter.cpp | 2 +- RegisterInfoEmitter.cpp | 12 +++++++++++- 2 files changed, 12 insertions(+), 2 deletions(-) Index: llvm/utils/TableGen/InstrInfoEmitter.cpp diff -u llvm/utils/TableGen/InstrInfoEmitter.cpp:1.43 llvm/utils/TableGen/InstrInfoEmitter.cpp:1.44 --- llvm/utils/TableGen/InstrInfoEmitter.cpp:1.43 Thu Jun 15 02:22:16 2006 +++ llvm/utils/TableGen/InstrInfoEmitter.cpp Fri Jul 21 15:57:35 2006 @@ -137,7 +137,7 @@ Record *RC = OperandInfo[i]; // FIXME: We only care about register operands for now. if (RC && RC->isSubClassOf("RegisterClass")) - OS << "{ &" << getQualifiedName(RC) << "RegClass, 0 }, "; + OS << "{ " << getQualifiedName(RC) << "RegClassID, 0 }, "; else if (RC && RC->getName() == "ptr_rc") // Ptr value whose register class is resolved via callback. OS << "{ 0, 1 }, "; Index: llvm/utils/TableGen/RegisterInfoEmitter.cpp diff -u llvm/utils/TableGen/RegisterInfoEmitter.cpp:1.47 llvm/utils/TableGen/RegisterInfoEmitter.cpp:1.48 --- llvm/utils/TableGen/RegisterInfoEmitter.cpp:1.47 Wed Jul 19 00:58:18 2006 +++ llvm/utils/TableGen/RegisterInfoEmitter.cpp Fri Jul 21 15:57:35 2006 @@ -68,6 +68,15 @@ if (!RegisterClasses.empty()) { OS << "namespace " << RegisterClasses[0].Namespace << " { // Register classes\n"; + + OS << " enum {\n"; + for (unsigned i = 0, e = RegisterClasses.size(); i != e; ++i) { + if (i) OS << ",\n"; + OS << " " << RegisterClasses[i].getName() << "RegClassID"; + if (!i) OS << " = 1"; + } + OS << "\n };\n\n"; + for (unsigned i = 0, e = RegisterClasses.size(); i != e; ++i) { const std::string &Name = RegisterClasses[i].getName(); @@ -165,7 +174,7 @@ for (unsigned i = 0, e = RegisterClasses.size(); i != e; ++i) OS << " " << RegisterClasses[i].getName() << "Class\t" << RegisterClasses[i].getName() << "RegClass;\n"; - + std::map<unsigned, std::set<unsigned> > SuperClassMap; OS << "\n"; // Emit the sub-classes array for each RegisterClass @@ -244,6 +253,7 @@ OS << RC.MethodBodies << "\n"; OS << RC.getName() << "Class::" << RC.getName() << "Class() : TargetRegisterClass(" + << RC.getName() + "RegClassID" << ", " << RC.getName() + "VTs" << ", " << RC.getName() + "Subclasses" << ", " << RC.getName() + "Superclasses" << ", " _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits