Changes in directory llvm/lib/CodeGen/SelectionDAG:
ScheduleDAG.cpp updated: 1.91 -> 1.92
SelectionDAGISel.cpp updated: 1.240 -> 1.241
---
Log message:
Move function-live-in-handling code from the sdisel code to the scheduler.
This code should be emitted after legalize, so it can't be in sdisel.
Note that the EmitFunctionEntryCode hook should be updated to operate on the
DAG. The X86 backend is the only one currently using this hook.
---
Diffs of the changes: (+15 -14)
ScheduleDAG.cpp | 14 ++++++++++++++
SelectionDAGISel.cpp | 15 +--------------
2 files changed, 15 insertions(+), 14 deletions(-)
Index: llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp:1.91
llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp:1.92
--- llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp:1.91 Sat May 13 03:22:24 2006
+++ llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp Tue May 16 01:10:57 2006
@@ -539,6 +539,20 @@
/// EmitSchedule - Emit the machine code in scheduled order.
void ScheduleDAG::EmitSchedule() {
+ // If this is the first basic block in the function, and if it has live ins
+ // that need to be copied into vregs, emit the copies into the top of the
+ // block before emitting the code for the block.
+ MachineFunction &MF = DAG.getMachineFunction();
+ if (&MF.front() == BB && MF.livein_begin() != MF.livein_end()) {
+ for (MachineFunction::livein_iterator LI = MF.livein_begin(),
+ E = MF.livein_end(); LI != E; ++LI)
+ if (LI->second)
+ MRI->copyRegToReg(*MF.begin(), MF.begin()->end(), LI->second,
+ LI->first, RegMap->getRegClass(LI->second));
+ }
+
+
+ // Finally, emit the code for all of the scheduled instructions.
std::map<SDNode*, unsigned> VRBaseMap;
for (unsigned i = 0, e = Sequence.size(); i != e; i++) {
if (SUnit *SU = Sequence[i]) {
Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.240
llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.241
--- llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1.240 Sat May 13
00:53:47 2006
+++ llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Tue May 16 01:10:58 2006
@@ -3150,24 +3150,11 @@
}
}
- // Next, if the function has live ins that need to be copied into vregs,
- // emit the copies now, into the top of the block.
- MachineFunction &MF = SDL.DAG.getMachineFunction();
- if (MF.livein_begin() != MF.livein_end()) {
- SSARegMap *RegMap = MF.getSSARegMap();
- const MRegisterInfo &MRI = *MF.getTarget().getRegisterInfo();
- for (MachineFunction::livein_iterator LI = MF.livein_begin(),
- E = MF.livein_end(); LI != E; ++LI)
- if (LI->second)
- MRI.copyRegToReg(*MF.begin(), MF.begin()->end(), LI->second,
- LI->first, RegMap->getRegClass(LI->second));
- }
-
// Finally, if the target has anything special to do, allow it to do so.
+ // FIXME: this should insert code into the DAG!
EmitFunctionEntryCode(F, SDL.DAG.getMachineFunction());
}
-
void SelectionDAGISel::BuildSelectionDAG(SelectionDAG &DAG, BasicBlock *LLVMBB,
std::vector<std::pair<MachineInstr*, unsigned> > &PHINodesToUpdate,
FunctionLoweringInfo &FuncInfo) {
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