[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp

[Chris Lattner]

Changes in directory llvm/lib/CodeGen/SelectionDAG:

ScheduleDAG.cpp updated: 1.84 -> 1.85
---
Log message:

Rename MO_VirtualRegister -> MO_Register.  Clean up immediate handling.


---
Diffs of the changes:  (+3 -3)

 ScheduleDAG.cpp |    6 +++---
 1 files changed, 3 insertions(+), 3 deletions(-)


Index: llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp:1.84 
llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp:1.85
--- llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp:1.84  Wed May  3 20:15:02 2006
+++ llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp       Thu May  4 13:05:43 2006
@@ -104,7 +104,7 @@
     }
   } else if (ConstantSDNode *C =
              dyn_cast<ConstantSDNode>(Op)) {
-    MI->addZeroExtImm64Operand(C->getValue());
+    MI->addImmOperand(C->getValue());
   } else if (RegisterSDNode*R =
              dyn_cast<RegisterSDNode>(Op)) {
     MI->addRegOperand(R->getReg(), MachineOperand::Use);
@@ -303,7 +303,7 @@
         unsigned Flags = cast<ConstantSDNode>(Node->getOperand(i))->getValue();
         unsigned NumVals = Flags >> 3;
         
-        MI->addZeroExtImm64Operand(Flags);
+        MI->addImmOperand(Flags);
         ++i;  // Skip the ID value.
         
         switch (Flags & 7) {
@@ -323,7 +323,7 @@
         case 3: { // Immediate.
           assert(NumVals == 1 && "Unknown immediate value!");
           uint64_t Val = cast<ConstantSDNode>(Node->getOperand(i))->getValue();
-          MI->addZeroExtImm64Operand(Val);
+          MI->addImmOperand(Val);
           ++i;
           break;
         }



_______________________________________________
llvm-commits mailing list
llvm-commits@cs.uiuc.edu
http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits