Changes in directory llvm/lib/Target/X86:
X86InstrSSE.td updated: 1.82 -> 1.83
---
Log message:
padds{b|w}, paddus{b|w}, psubs{b|w}, psubus{b|w} intrinsics.
---
Diffs of the changes: (+78 -8)
X86InstrSSE.td | 86 +++++++++++++++++++++++++++++++++++++++++++++++++++------
1 files changed, 78 insertions(+), 8 deletions(-)
Index: llvm/lib/Target/X86/X86InstrSSE.td
diff -u llvm/lib/Target/X86/X86InstrSSE.td:1.82
llvm/lib/Target/X86/X86InstrSSE.td:1.83
--- llvm/lib/Target/X86/X86InstrSSE.td:1.82 Wed Apr 12 19:00:23 2006
+++ llvm/lib/Target/X86/X86InstrSSE.td Wed Apr 12 19:43:35 2006
@@ -1283,23 +1283,59 @@
"paddq {$src2, $dst|$dst, $src2}",
[(set VR128:$dst, (v2i64 (add VR128:$src1, VR128:$src2)))]>;
}
-def PADDBrm : PDI<0xFC, MRMSrcMem, (ops VR128:$dst, VR128:$src1,
f128mem:$src2),
+def PADDBrm : PDI<0xFC, MRMSrcMem, (ops VR128:$dst, VR128:$src1,
i128mem:$src2),
"paddb {$src2, $dst|$dst, $src2}",
[(set VR128:$dst, (v16i8 (add VR128:$src1,
(load addr:$src2))))]>;
-def PADDWrm : PDI<0xFD, MRMSrcMem, (ops VR128:$dst, VR128:$src1,
f128mem:$src2),
+def PADDWrm : PDI<0xFD, MRMSrcMem, (ops VR128:$dst, VR128:$src1,
i128mem:$src2),
"paddw {$src2, $dst|$dst, $src2}",
[(set VR128:$dst, (v8i16 (add VR128:$src1,
(load addr:$src2))))]>;
-def PADDDrm : PDI<0xFE, MRMSrcMem, (ops VR128:$dst, VR128:$src1,
f128mem:$src2),
+def PADDDrm : PDI<0xFE, MRMSrcMem, (ops VR128:$dst, VR128:$src1,
i128mem:$src2),
"paddd {$src2, $dst|$dst, $src2}",
[(set VR128:$dst, (v4i32 (add VR128:$src1,
(load addr:$src2))))]>;
-def PADDQrm : PDI<0xD4, MRMSrcMem, (ops VR128:$dst, VR128:$src1,
f128mem:$src2),
+def PADDQrm : PDI<0xD4, MRMSrcMem, (ops VR128:$dst, VR128:$src1,
i128mem:$src2),
"paddd {$src2, $dst|$dst, $src2}",
[(set VR128:$dst, (v2i64 (add VR128:$src1,
(load addr:$src2))))]>;
+let isCommutable = 1 in {
+def PADDSBrr : PDI<0xEC, MRMSrcReg, (ops VR128:$dst, VR128:$src1, VR128:$src2),
+ "paddsb {$src2, $dst|$dst, $src2}",
+ [(set VR128:$dst, (int_x86_sse2_padds_b VR128:$src1,
+ VR128:$src2))]>;
+def PADDSWrr : PDI<0xED, MRMSrcReg, (ops VR128:$dst, VR128:$src1, VR128:$src2),
+ "paddsw {$src2, $dst|$dst, $src2}",
+ [(set VR128:$dst, (int_x86_sse2_padds_w VR128:$src1,
+ VR128:$src2))]>;
+def PADDUSBrr : PDI<0xDC, MRMSrcReg, (ops VR128:$dst, VR128:$src1,
VR128:$src2),
+ "paddusb {$src2, $dst|$dst, $src2}",
+ [(set VR128:$dst, (int_x86_sse2_paddus_b VR128:$src1,
+ VR128:$src2))]>;
+def PADDUSWrr : PDI<0xDD, MRMSrcReg, (ops VR128:$dst, VR128:$src1,
VR128:$src2),
+ "paddusw {$src2, $dst|$dst, $src2}",
+ [(set VR128:$dst, (int_x86_sse2_paddus_w VR128:$src1,
+ VR128:$src2))]>;
+}
+def PADDSBrm : PDI<0xEC, MRMSrcMem, (ops VR128:$dst, VR128:$src1,
i128mem:$src2),
+ "paddsb {$src2, $dst|$dst, $src2}",
+ [(set VR128:$dst, (int_x86_sse2_padds_b VR128:$src1,
+ (bc_v16i8 (loadv2i64 addr:$src2))))]>;
+def PADDSWrm : PDI<0xED, MRMSrcMem, (ops VR128:$dst, VR128:$src1,
i128mem:$src2),
+ "paddsw {$src2, $dst|$dst, $src2}",
+ [(set VR128:$dst, (int_x86_sse2_padds_w VR128:$src1,
+ (bc_v8i16 (loadv2i64 addr:$src2))))]>;
+def PADDUSBrm : PDI<0xDC, MRMSrcMem, (ops VR128:$dst, VR128:$src1,
i128mem:$src2),
+ "paddusb {$src2, $dst|$dst, $src2}",
+ [(set VR128:$dst, (int_x86_sse2_paddus_b VR128:$src1,
+ (bc_v16i8 (loadv2i64 addr:$src2))))]>;
+def PADDUSWrm : PDI<0xDD, MRMSrcMem, (ops VR128:$dst, VR128:$src1,
i128mem:$src2),
+ "paddusw {$src2, $dst|$dst, $src2}",
+ [(set VR128:$dst, (int_x86_sse2_paddus_w VR128:$src1,
+ (bc_v8i16 (loadv2i64 addr:$src2))))]>;
+
+
def PSUBBrr : PDI<0xF8, MRMSrcReg, (ops VR128:$dst, VR128:$src1, VR128:$src2),
"psubb {$src2, $dst|$dst, $src2}",
[(set VR128:$dst, (v16i8 (sub VR128:$src1, VR128:$src2)))]>;
@@ -1313,22 +1349,56 @@
"psubq {$src2, $dst|$dst, $src2}",
[(set VR128:$dst, (v2i64 (sub VR128:$src1, VR128:$src2)))]>;
-def PSUBBrm : PDI<0xF8, MRMSrcMem, (ops VR128:$dst, VR128:$src1,
f128mem:$src2),
+def PSUBBrm : PDI<0xF8, MRMSrcMem, (ops VR128:$dst, VR128:$src1,
i128mem:$src2),
"psubb {$src2, $dst|$dst, $src2}",
[(set VR128:$dst, (v16i8 (sub VR128:$src1,
(load addr:$src2))))]>;
-def PSUBWrm : PDI<0xF9, MRMSrcMem, (ops VR128:$dst, VR128:$src1,
f128mem:$src2),
+def PSUBWrm : PDI<0xF9, MRMSrcMem, (ops VR128:$dst, VR128:$src1,
i128mem:$src2),
"psubw {$src2, $dst|$dst, $src2}",
[(set VR128:$dst, (v8i16 (sub VR128:$src1,
(load addr:$src2))))]>;
-def PSUBDrm : PDI<0xFA, MRMSrcMem, (ops VR128:$dst, VR128:$src1,
f128mem:$src2),
+def PSUBDrm : PDI<0xFA, MRMSrcMem, (ops VR128:$dst, VR128:$src1,
i128mem:$src2),
"psubd {$src2, $dst|$dst, $src2}",
[(set VR128:$dst, (v4i32 (sub VR128:$src1,
(load addr:$src2))))]>;
-def PSUBQrm : PDI<0xFB, MRMSrcMem, (ops VR128:$dst, VR128:$src1,
f128mem:$src2),
+def PSUBQrm : PDI<0xFB, MRMSrcMem, (ops VR128:$dst, VR128:$src1,
i128mem:$src2),
"psubd {$src2, $dst|$dst, $src2}",
[(set VR128:$dst, (v2i64 (sub VR128:$src1,
(load addr:$src2))))]>;
+
+def PSUBSBrr : PDI<0xE8, MRMSrcReg, (ops VR128:$dst, VR128:$src1, VR128:$src2),
+ "psubsb {$src2, $dst|$dst, $src2}",
+ [(set VR128:$dst, (int_x86_sse2_psubs_b VR128:$src1,
+ VR128:$src2))]>;
+def PSUBSWrr : PDI<0xE9, MRMSrcReg, (ops VR128:$dst, VR128:$src1, VR128:$src2),
+ "psubsw {$src2, $dst|$dst, $src2}",
+ [(set VR128:$dst, (int_x86_sse2_psubs_w VR128:$src1,
+ VR128:$src2))]>;
+def PSUBUSBrr : PDI<0xD8, MRMSrcReg, (ops VR128:$dst, VR128:$src1,
VR128:$src2),
+ "psubusb {$src2, $dst|$dst, $src2}",
+ [(set VR128:$dst, (int_x86_sse2_psubus_b VR128:$src1,
+ VR128:$src2))]>;
+def PSUBUSWrr : PDI<0xD9, MRMSrcReg, (ops VR128:$dst, VR128:$src1,
VR128:$src2),
+ "psubusw {$src2, $dst|$dst, $src2}",
+ [(set VR128:$dst, (int_x86_sse2_psubus_w VR128:$src1,
+ VR128:$src2))]>;
+
+def PSUBSBrm : PDI<0xE8, MRMSrcMem, (ops VR128:$dst, VR128:$src1,
i128mem:$src2),
+ "psubsb {$src2, $dst|$dst, $src2}",
+ [(set VR128:$dst, (int_x86_sse2_psubs_b VR128:$src1,
+ (bc_v16i8 (loadv2i64 addr:$src2))))]>;
+def PSUBSWrm : PDI<0xE9, MRMSrcMem, (ops VR128:$dst, VR128:$src1,
i128mem:$src2),
+ "psubsw {$src2, $dst|$dst, $src2}",
+ [(set VR128:$dst, (int_x86_sse2_psubs_w VR128:$src1,
+ (bc_v8i16 (loadv2i64 addr:$src2))))]>;
+def PSUBUSBrm : PDI<0xD8, MRMSrcMem, (ops VR128:$dst, VR128:$src1,
i128mem:$src2),
+ "psubusb {$src2, $dst|$dst, $src2}",
+ [(set VR128:$dst, (int_x86_sse2_psubus_b VR128:$src1,
+ (bc_v16i8 (loadv2i64 addr:$src2))))]>;
+def PSUBUSWrm : PDI<0xD9, MRMSrcMem, (ops VR128:$dst, VR128:$src1,
i128mem:$src2),
+ "psubusw {$src2, $dst|$dst, $src2}",
+ [(set VR128:$dst, (int_x86_sse2_psubus_w VR128:$src1,
+ (bc_v8i16 (loadv2i64 addr:$src2))))]>;
}
let isTwoAddress = 1 in {
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