[llvm-commits] CVS: llvm/lib/Target/Alpha/AlphaISelLowering.cpp

[Andrew Lenharth]

Changes in directory llvm/lib/Target/Alpha:

AlphaISelLowering.cpp updated: 1.44 -> 1.45
---
Log message:

fix some linking problems with the new gcc

---
Diffs of the changes:  (+3 -1)

 AlphaISelLowering.cpp |    4 +++-
 1 files changed, 3 insertions(+), 1 deletion(-)


Index: llvm/lib/Target/Alpha/AlphaISelLowering.cpp
diff -u llvm/lib/Target/Alpha/AlphaISelLowering.cpp:1.44 
llvm/lib/Target/Alpha/AlphaISelLowering.cpp:1.45
--- llvm/lib/Target/Alpha/AlphaISelLowering.cpp:1.44    Sun Apr  2 22:18:59 2006
+++ llvm/lib/Target/Alpha/AlphaISelLowering.cpp Thu Apr  6 16:26:32 2006
@@ -571,7 +571,7 @@
     GlobalValue *GV = GSDN->getGlobal();
     SDOperand GA = DAG.getTargetGlobalAddress(GV, MVT::i64, GSDN->getOffset());
 
-    if (!GV->hasWeakLinkage() && !GV->isExternal()) {
+    if (!GV->hasWeakLinkage() && !GV->isExternal() && 
!GV->hasLinkOnceLinkage()) {
       SDOperand Hi = DAG.getNode(AlphaISD::GPRelHi,  MVT::i64, GA,
                                 DAG.getNode(AlphaISD::GlobalBaseReg, 
MVT::i64));
       SDOperand Lo = DAG.getNode(AlphaISD::GPRelLo, MVT::i64, GA, Hi);
@@ -602,6 +602,8 @@
   case ISD::SDIV:
   case ISD::UDIV:
     if (MVT::isInteger(Op.getValueType())) {
+      if (Op.getOperand(1).getOpcode() == ISD::Constant)
+       return Op.getOpcode() == ISD::SDIV ? BuildSDIVSequence(Op, &DAG) : 
BuildUDIVSequence(Op, &DAG);
       const char* opstr = 0;
       switch(Op.getOpcode()) {
       case ISD::UREM: opstr = "__remqu"; break;



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