Changes in directory llvm/lib/Target/X86:
X86InstrSSE.td updated: 1.46 -> 1.47 --- Log message: Add 128-bit pmovmskb intrinsic support. --- Diffs of the changes: (+12 -7) X86InstrSSE.td | 19 ++++++++++++------- 1 files changed, 12 insertions(+), 7 deletions(-) Index: llvm/lib/Target/X86/X86InstrSSE.td diff -u llvm/lib/Target/X86/X86InstrSSE.td:1.46 llvm/lib/Target/X86/X86InstrSSE.td:1.47 --- llvm/lib/Target/X86/X86InstrSSE.td:1.46 Wed Mar 29 17:52:48 2006 +++ llvm/lib/Target/X86/X86InstrSSE.td Wed Mar 29 18:33:26 2006 @@ -686,13 +686,6 @@ MOVHLPS_shuffle_mask)))]>; } -def MOVMSKPSrr : PSI<0x50, MRMSrcReg, (ops R32:$dst, VR128:$src), - "movmskps {$src, $dst|$dst, $src}", - [(set R32:$dst, (int_x86_sse_movmsk_ps VR128:$src))]>; -def MOVMSKPDrr : PSI<0x50, MRMSrcReg, (ops R32:$dst, VR128:$src), - "movmskpd {$src, $dst|$dst, $src}", - [(set R32:$dst, (int_x86_sse2_movmskpd VR128:$src))]>; - // Conversion instructions def CVTPI2PSrr : PSI<0x2A, MRMSrcReg, (ops VR128:$dst, VR64:$src), "cvtpi2ps {$src, $dst|$dst, $src}", []>; @@ -1374,6 +1367,18 @@ // Miscellaneous Instructions //===----------------------------------------------------------------------===// +// Mask creation +def MOVMSKPSrr : PSI<0x50, MRMSrcReg, (ops R32:$dst, VR128:$src), + "movmskps {$src, $dst|$dst, $src}", + [(set R32:$dst, (int_x86_sse_movmsk_ps VR128:$src))]>; +def MOVMSKPDrr : PSI<0x50, MRMSrcReg, (ops R32:$dst, VR128:$src), + "movmskpd {$src, $dst|$dst, $src}", + [(set R32:$dst, (int_x86_sse2_movmskpd VR128:$src))]>; + +def PMOVMSKBrr : PDI<0xD7, MRMSrcReg, (ops R32:$dst, VR128:$src), + "pmovmskb {$src, $dst|$dst, $src}", + [(set R32:$dst, (int_x86_sse2_pmovmskb_128 VR128:$src))]>; + // Prefetching loads def PREFETCHT0 : I<0x18, MRM1m, (ops i8mem:$src), "prefetcht0 $src", []>, TB, _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits