Changes in directory llvm/lib/Target/SparcV8:
SparcV8AsmPrinter.cpp updated: 1.44 -> 1.45
SparcV8ISelDAGToDAG.cpp updated: 1.3 -> 1.4
SparcV8InstrInfo.td updated: 1.55 -> 1.56
---
Log message:
Add basic addressing mode support and one load.
---
Diffs of the changes: (+48 -3)
SparcV8AsmPrinter.cpp | 8 ++++++++
SparcV8ISelDAGToDAG.cpp | 20 ++++++++++++++++++++
SparcV8InstrInfo.td | 23 ++++++++++++++++++++---
3 files changed, 48 insertions(+), 3 deletions(-)
Index: llvm/lib/Target/SparcV8/SparcV8AsmPrinter.cpp
diff -u llvm/lib/Target/SparcV8/SparcV8AsmPrinter.cpp:1.44
llvm/lib/Target/SparcV8/SparcV8AsmPrinter.cpp:1.45
--- llvm/lib/Target/SparcV8/SparcV8AsmPrinter.cpp:1.44 Sat Dec 17 01:17:08 2005
+++ llvm/lib/Target/SparcV8/SparcV8AsmPrinter.cpp Sat Dec 17 14:04:49 2005
@@ -54,6 +54,7 @@
}
void printOperand(const MachineInstr *MI, int opNum);
+ void printMemOperand(const MachineInstr *MI, int opNum);
bool printInstruction(const MachineInstr *MI); // autogenerated.
bool runOnMachineFunction(MachineFunction &F);
bool doInitialization(Module &M);
@@ -182,6 +183,13 @@
if (CloseParen) O << ")";
}
+void SparcV8AsmPrinter::printMemOperand(const MachineInstr *MI, int opNum) {
+ printOperand(MI, opNum);
+ O << "+";
+ printOperand(MI, opNum+1);
+}
+
+
bool SparcV8AsmPrinter::doInitialization(Module &M) {
Mang = new Mangler(M);
return false; // success
Index: llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp
diff -u llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.3
llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.4
--- llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.3 Sat Dec 17 02:15:09 2005
+++ llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp Sat Dec 17 14:04:49 2005
@@ -187,6 +187,10 @@
SDOperand Select(SDOperand Op);
+ // Complex Pattern Selectors.
+ bool SelectADDRrr(SDOperand N, SDOperand &R1, SDOperand &R2);
+ bool SelectADDRri(SDOperand N, SDOperand &Base, SDOperand &Offset);
+
/// InstructionSelectBasicBlock - This callback is invoked by
/// SelectionDAGISel when it has created a SelectionDAG for us to codegen.
virtual void InstructionSelectBasicBlock(SelectionDAG &DAG);
@@ -214,6 +218,22 @@
ScheduleAndEmitDAG(DAG);
}
+bool SparcV8DAGToDAGISel::SelectADDRrr(SDOperand N, SDOperand &R1,
+ SDOperand &R2) {
+ // FIXME: This should obviously be smarter.
+ R1 = Select(N);
+ R2 = CurDAG->getRegister(V8::G0, MVT::i32);
+ return true;
+}
+
+bool SparcV8DAGToDAGISel::SelectADDRri(SDOperand N, SDOperand &Base,
+ SDOperand &Offset) {
+ // FIXME: This should obviously be smarter.
+ Base = Select(N);
+ Offset = CurDAG->getTargetConstant(0, MVT::i32);
+ return true;
+}
+
SDOperand SparcV8DAGToDAGISel::Select(SDOperand Op) {
SDNode *N = Op.Val;
Index: llvm/lib/Target/SparcV8/SparcV8InstrInfo.td
diff -u llvm/lib/Target/SparcV8/SparcV8InstrInfo.td:1.55
llvm/lib/Target/SparcV8/SparcV8InstrInfo.td:1.56
--- llvm/lib/Target/SparcV8/SparcV8InstrInfo.td:1.55 Sat Dec 17 13:41:43 2005
+++ llvm/lib/Target/SparcV8/SparcV8InstrInfo.td Sat Dec 17 14:04:49 2005
@@ -52,6 +52,22 @@
return (((unsigned)N->getValue() >> 10) << 10) == (unsigned)N->getValue();
}], HI22>;
+// Addressing modes.
+def ADDRrr : ComplexPattern<i32, 2, "SelectADDRrr", []>;
+def ADDRri : ComplexPattern<i32, 2, "SelectADDRri", []>;
+
+// Address operands
+def MEMrr : Operand<i32> {
+ let PrintMethod = "printMemOperand";
+ let NumMIOperands = 2;
+ let MIOperandInfo = (ops IntRegs, IntRegs);
+}
+def MEMri : Operand<i32> {
+ let PrintMethod = "printMemOperand";
+ let NumMIOperands = 2;
+ let MIOperandInfo = (ops IntRegs, i32imm);
+}
+
//===----------------------------------------------------------------------===//
// Instructions
//===----------------------------------------------------------------------===//
@@ -104,8 +120,9 @@
(ops IntRegs:$dst, IntRegs:$b, i32imm:$c),
"lduh [$b+$c], $dst", []>;
def LD : F3_2<3, 0b000000,
- (ops IntRegs:$dst, IntRegs:$b, i32imm:$c),
- "ld [$b+$c], $dst", []>;
+ (ops IntRegs:$dst, MEMri:$addr),
+ "ld [$addr], $dst",
+ [(set IntRegs:$dst, (load ADDRri:$addr))]>;
def LDD : F3_2<3, 0b000011,
(ops IntRegs:$dst, IntRegs:$b, i32imm:$c),
"ldd [$b+$c], $dst", []>;
@@ -586,4 +603,4 @@
(ORri G0, imm:$val)>;
// Arbitrary immediates.
def : Pat<(i32 imm:$val),
- (ORri (SETHIi (HI22 imm:$val)), (LO10 imm:$val))>;
\ No newline at end of file
+ (ORri (SETHIi (HI22 imm:$val)), (LO10 imm:$val))>;
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