Changes in directory llvm/lib/Target/SparcV8:
SparcV8InstrInfo.td updated: 1.49 -> 1.50
---
Log message:
Add some simple integer patterns. This allows us to compile this:
int %test(int %A) {
%B = add int %A, 1
%C = xor int %B, 123
ret int %C
}
into this:
test:
save -96, %sp, %sp
add %i0, 1, %l0
xor %l0, 123, %i0
restore %g0, %g0, %g0
retl
nop
for example. I guess it would make sense to add reg/reg versions too.
---
Diffs of the changes: (+19 -5)
SparcV8InstrInfo.td | 24 +++++++++++++++++++-----
1 files changed, 19 insertions(+), 5 deletions(-)
Index: llvm/lib/Target/SparcV8/SparcV8InstrInfo.td
diff -u llvm/lib/Target/SparcV8/SparcV8InstrInfo.td:1.49
llvm/lib/Target/SparcV8/SparcV8InstrInfo.td:1.50
--- llvm/lib/Target/SparcV8/SparcV8InstrInfo.td:1.49 Sat Dec 17 02:08:42 2005
+++ llvm/lib/Target/SparcV8/SparcV8InstrInfo.td Sat Dec 17 02:26:38 2005
@@ -31,6 +31,15 @@
include "SparcV8InstrFormats.td"
//===----------------------------------------------------------------------===//
+// Instruction Pattern Stuff
+//===----------------------------------------------------------------------===//
+
+def simm13 : PatLeaf<(imm), [{
+ // simm13 predicate - True if the imm fits in a 13-bit sign extended field.
+ return (((int)N->getValue() << (32-13)) >> (32-13)) == (int)N->getValue();
+}]>;
+
+//===----------------------------------------------------------------------===//
// Instructions
//===----------------------------------------------------------------------===//
@@ -164,7 +173,8 @@
"and $b, $c, $dst">;
def ANDri : F3_2<2, 0b000001,
(ops IntRegs:$dst, IntRegs:$b, i32imm:$c),
- "and $b, $c, $dst", []>;
+ "and $b, $c, $dst",
+ [(set IntRegs:$dst, (and IntRegs:$b, simm13:$c))]>;
def ANDCCrr : F3_1<2, 0b010001,
(ops IntRegs:$dst, IntRegs:$b, IntRegs:$c),
"andcc $b, $c, $dst">;
@@ -188,7 +198,8 @@
"or $b, $c, $dst">;
def ORri : F3_2<2, 0b000010,
(ops IntRegs:$dst, IntRegs:$b, i32imm:$c),
- "or $b, $c, $dst", []>;
+ "or $b, $c, $dst",
+ [(set IntRegs:$dst, (or IntRegs:$b, simm13:$c))]>;
def ORCCrr : F3_1<2, 0b010010,
(ops IntRegs:$dst, IntRegs:$b, IntRegs:$c),
"orcc $b, $c, $dst">;
@@ -212,7 +223,8 @@
"xor $b, $c, $dst">;
def XORri : F3_2<2, 0b000011,
(ops IntRegs:$dst, IntRegs:$b, i32imm:$c),
- "xor $b, $c, $dst", []>;
+ "xor $b, $c, $dst",
+ [(set IntRegs:$dst, (xor IntRegs:$b, simm13:$c))]>;
def XORCCrr : F3_1<2, 0b010011,
(ops IntRegs:$dst, IntRegs:$b, IntRegs:$c),
"xorcc $b, $c, $dst">;
@@ -258,7 +270,8 @@
"add $b, $c, $dst">;
def ADDri : F3_2<2, 0b000000,
(ops IntRegs:$dst, IntRegs:$b, i32imm:$c),
- "add $b, $c, $dst", []>;
+ "add $b, $c, $dst",
+ [(set IntRegs:$dst, (add IntRegs:$b, simm13:$c))]>;
def ADDCCrr : F3_1<2, 0b010000,
(ops IntRegs:$dst, IntRegs:$b, IntRegs:$c),
"addcc $b, $c, $dst">;
@@ -284,7 +297,8 @@
"sub $b, $c, $dst">;
def SUBri : F3_2<2, 0b000100,
(ops IntRegs:$dst, IntRegs:$b, i32imm:$c),
- "sub $b, $c, $dst", []>;
+ "sub $b, $c, $dst",
+ [(set IntRegs:$dst, (sub IntRegs:$b, simm13:$c))]>;
def SUBCCrr : F3_1<2, 0b010100,
(ops IntRegs:$dst, IntRegs:$b, IntRegs:$c),
"subcc $b, $c, $dst">;
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