Changes in directory llvm/lib/Target/X86:
X86ATTAsmPrinter.cpp updated: 1.16 -> 1.17 X86ATTAsmPrinter.h updated: 1.2 -> 1.3 X86InstrInfo.td updated: 1.143 -> 1.144 X86IntelAsmPrinter.cpp updated: 1.12 -> 1.13 X86IntelAsmPrinter.h updated: 1.2 -> 1.3 --- Log message: No longer track value types for asm printer operands, and remove them as an argument to every operand printing function. Requires some slight tweaks to x86, the only user. --- Diffs of the changes: (+65 -40) X86ATTAsmPrinter.cpp | 3 +-- X86ATTAsmPrinter.h | 32 +++++++++++++++++++++++--------- X86InstrInfo.td | 22 +++++++++++----------- X86IntelAsmPrinter.cpp | 3 +-- X86IntelAsmPrinter.h | 45 +++++++++++++++++++++++++++++---------------- 5 files changed, 65 insertions(+), 40 deletions(-) Index: llvm/lib/Target/X86/X86ATTAsmPrinter.cpp diff -u llvm/lib/Target/X86/X86ATTAsmPrinter.cpp:1.16 llvm/lib/Target/X86/X86ATTAsmPrinter.cpp:1.17 --- llvm/lib/Target/X86/X86ATTAsmPrinter.cpp:1.16 Mon Nov 21 17:06:54 2005 +++ llvm/lib/Target/X86/X86ATTAsmPrinter.cpp Wed Nov 30 12:54:35 2005 @@ -145,8 +145,7 @@ } } -void X86ATTAsmPrinter::printSSECC(const MachineInstr *MI, unsigned Op, - MVT::ValueType VT) { +void X86ATTAsmPrinter::printSSECC(const MachineInstr *MI, unsigned Op) { unsigned char value = MI->getOperand(Op).getImmedValue(); assert(value <= 7 && "Invalid ssecc argument!"); switch (value) { Index: llvm/lib/Target/X86/X86ATTAsmPrinter.h diff -u llvm/lib/Target/X86/X86ATTAsmPrinter.h:1.2 llvm/lib/Target/X86/X86ATTAsmPrinter.h:1.3 --- llvm/lib/Target/X86/X86ATTAsmPrinter.h:1.2 Thu Jul 14 17:52:25 2005 +++ llvm/lib/Target/X86/X86ATTAsmPrinter.h Wed Nov 30 12:54:35 2005 @@ -35,23 +35,37 @@ bool printInstruction(const MachineInstr *MI); // This method is used by the tablegen'erated instruction printer. - void printOperand(const MachineInstr *MI, unsigned OpNo, MVT::ValueType VT){ + void printOperand(const MachineInstr *MI, unsigned OpNo){ printOp(MI->getOperand(OpNo)); } - - void printCallOperand(const MachineInstr *MI, unsigned OpNo, - MVT::ValueType VT) { + void printCallOperand(const MachineInstr *MI, unsigned OpNo) { printOp(MI->getOperand(OpNo), true); // Don't print '$' prefix. } - - void printMemoryOperand(const MachineInstr *MI, unsigned OpNo, - MVT::ValueType VT) { + void printi8mem(const MachineInstr *MI, unsigned OpNo) { printMemReference(MI, OpNo); } - + void printi16mem(const MachineInstr *MI, unsigned OpNo) { + printMemReference(MI, OpNo); + } + void printi32mem(const MachineInstr *MI, unsigned OpNo) { + printMemReference(MI, OpNo); + } + void printi64mem(const MachineInstr *MI, unsigned OpNo) { + printMemReference(MI, OpNo); + } + void printf32mem(const MachineInstr *MI, unsigned OpNo) { + printMemReference(MI, OpNo); + } + void printf64mem(const MachineInstr *MI, unsigned OpNo) { + printMemReference(MI, OpNo); + } + void printf80mem(const MachineInstr *MI, unsigned OpNo) { + printMemReference(MI, OpNo); + } + void printMachineInstruction(const MachineInstr *MI); void printOp(const MachineOperand &MO, bool isCallOperand = false); - void printSSECC(const MachineInstr *MI, unsigned Op, MVT::ValueType VT); + void printSSECC(const MachineInstr *MI, unsigned Op); void printMemReference(const MachineInstr *MI, unsigned Op); bool runOnMachineFunction(MachineFunction &F); }; Index: llvm/lib/Target/X86/X86InstrInfo.td diff -u llvm/lib/Target/X86/X86InstrInfo.td:1.143 llvm/lib/Target/X86/X86InstrInfo.td:1.144 --- llvm/lib/Target/X86/X86InstrInfo.td:1.143 Tue Nov 29 23:11:18 2005 +++ llvm/lib/Target/X86/X86InstrInfo.td Wed Nov 30 12:54:35 2005 @@ -15,24 +15,24 @@ // *mem - Operand definitions for the funky X86 addressing mode operands. // - -class X86MemOperand<ValueType Ty> : Operand<Ty> { - let PrintMethod = "printMemoryOperand"; +class X86MemOperand<ValueType Ty, string printMethod> : Operand<Ty> { + let PrintMethod = printMethod; let NumMIOperands = 4; let MIOperandInfo = (ops R32, i8imm, R32, i32imm); } + +def i8mem : X86MemOperand<i8, "printi8mem">; +def i16mem : X86MemOperand<i16, "printi16mem">; +def i32mem : X86MemOperand<i32, "printi32mem">; +def i64mem : X86MemOperand<i64, "printi64mem">; +def f32mem : X86MemOperand<f32, "printf32mem">; +def f64mem : X86MemOperand<f64, "printf64mem">; +def f80mem : X86MemOperand<f80, "printf80mem">; + def SSECC : Operand<i8> { let PrintMethod = "printSSECC"; } -def i8mem : X86MemOperand<i8>; -def i16mem : X86MemOperand<i16>; -def i32mem : X86MemOperand<i32>; -def i64mem : X86MemOperand<i64>; -def f32mem : X86MemOperand<f32>; -def f64mem : X86MemOperand<f64>; -def f80mem : X86MemOperand<f80>; - // A couple of more descriptive operand definitions. // 16-bits but only 8 bits are significant. def i16i8imm : Operand<i16>; Index: llvm/lib/Target/X86/X86IntelAsmPrinter.cpp diff -u llvm/lib/Target/X86/X86IntelAsmPrinter.cpp:1.12 llvm/lib/Target/X86/X86IntelAsmPrinter.cpp:1.13 --- llvm/lib/Target/X86/X86IntelAsmPrinter.cpp:1.12 Tue Nov 29 19:59:00 2005 +++ llvm/lib/Target/X86/X86IntelAsmPrinter.cpp Wed Nov 30 12:54:35 2005 @@ -59,8 +59,7 @@ return false; } -void X86IntelAsmPrinter::printSSECC(const MachineInstr *MI, unsigned Op, - MVT::ValueType VT) { +void X86IntelAsmPrinter::printSSECC(const MachineInstr *MI, unsigned Op) { unsigned char value = MI->getOperand(Op).getImmedValue(); assert(value <= 7 && "Invalid ssecc argument!"); switch (value) { Index: llvm/lib/Target/X86/X86IntelAsmPrinter.h diff -u llvm/lib/Target/X86/X86IntelAsmPrinter.h:1.2 llvm/lib/Target/X86/X86IntelAsmPrinter.h:1.3 --- llvm/lib/Target/X86/X86IntelAsmPrinter.h:1.2 Thu Jul 14 17:52:25 2005 +++ llvm/lib/Target/X86/X86IntelAsmPrinter.h Wed Nov 30 12:54:35 2005 @@ -37,7 +37,7 @@ bool printInstruction(const MachineInstr *MI); // This method is used by the tablegen'erated instruction printer. - void printOperand(const MachineInstr *MI, unsigned OpNo, MVT::ValueType VT){ + void printOperand(const MachineInstr *MI, unsigned OpNo){ const MachineOperand &MO = MI->getOperand(OpNo); if (MO.getType() == MachineOperand::MO_MachineRegister) { assert(MRegisterInfo::isPhysicalRegister(MO.getReg())&&"Not physref??"); @@ -48,29 +48,42 @@ } } - void printCallOperand(const MachineInstr *MI, unsigned OpNo, - MVT::ValueType VT) { + void printCallOperand(const MachineInstr *MI, unsigned OpNo) { printOp(MI->getOperand(OpNo), true); // Don't print "OFFSET". } - void printMemoryOperand(const MachineInstr *MI, unsigned OpNo, - MVT::ValueType VT) { - switch (VT) { - default: assert(0 && "Unknown arg size!"); - case MVT::i8: O << "BYTE PTR "; break; - case MVT::i16: O << "WORD PTR "; break; - case MVT::i32: - case MVT::f32: O << "DWORD PTR "; break; - case MVT::i64: - case MVT::f64: O << "QWORD PTR "; break; - case MVT::f80: O << "XWORD PTR "; break; - } + void printi8mem(const MachineInstr *MI, unsigned OpNo) { + O << "BYTE PTR "; + printMemReference(MI, OpNo); + } + void printi16mem(const MachineInstr *MI, unsigned OpNo) { + O << "WORD PTR "; + printMemReference(MI, OpNo); + } + void printi32mem(const MachineInstr *MI, unsigned OpNo) { + O << "WORD PTR "; + printMemReference(MI, OpNo); + } + void printi64mem(const MachineInstr *MI, unsigned OpNo) { + O << "DWORD PTR "; + printMemReference(MI, OpNo); + } + void printf32mem(const MachineInstr *MI, unsigned OpNo) { + O << "DWORD PTR "; + printMemReference(MI, OpNo); + } + void printf64mem(const MachineInstr *MI, unsigned OpNo) { + O << "QWORD PTR "; + printMemReference(MI, OpNo); + } + void printf80mem(const MachineInstr *MI, unsigned OpNo) { + O << "XWORD PTR "; printMemReference(MI, OpNo); } void printMachineInstruction(const MachineInstr *MI); void printOp(const MachineOperand &MO, bool elideOffsetKeyword = false); - void printSSECC(const MachineInstr *MI, unsigned Op, MVT::ValueType VT); + void printSSECC(const MachineInstr *MI, unsigned Op); void printMemReference(const MachineInstr *MI, unsigned Op); bool runOnMachineFunction(MachineFunction &F); bool doInitialization(Module &M); _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits