| Issue |
204499
|
| Summary |
SPIRV target TTI is incomplete — loop/vectorization passes use inaccurate generic costs
|
| Labels |
new issue
|
| Assignees |
|
| Reporter |
wenju-he
|
This is inspired by @arsenm's comment at https://github.com/llvm/llvm-project/pull/202891#issuecomment-4734684073
SPIRVTargetTransformInfo currently only implements:
- getPopcntSupport
- getFlatAddressSpace / address space intrinsic handling
- isLegalMaskedGather / isLegalMaskedScatter
- getPartialReductionCost (returns Invalid)
Everything else falls back to BasicTTIImplBase defaults, which are not meaningful for a virtual ISA like SPIR-V. This causes loop optimization passes (loop rotation, unrolling, vectorization), ReassociatePass, and SimplifyCFG transformations to make decisions
based on wrong cost estimates.
SPIR-V is an intermediate representation targeting heterogeneous backends (GPU, CPU, FPGA). Optimizations like loop unrolling and vectorization that are beneficial for concrete targets may produce worse IR for downstream compilers that will re-optimize with
accurate target knowledge.
Impact:
- SYCL SPIR-V: The downstream intel-llvm fork works around this by disabling these passes wholesale via a SYCLOptimizationMode flag when compiling for SPIR/SPIR-V targets. Proper TTI implementation would eliminate this workaround. Tag @bader
- libclc SPIR-V: libclc currently compiles with -O0 for SPIR-V targets, forgoing all optimization. With accurate TTI, libclc could run the standard optimization pipeline and produce better-optimized built-in implementations. Tag @karolherbst
The proper fix is to implement SPIR-V-appropriate (conservative or disabled) TTI responses in SPIRVTargetTransformInfo — e.g., getUnrollingPreferences, getVectorizationFactor, getArithmeticInstrCost — so passes make correct decisions without being disabled.
Assisted-by: Claude
![]()
_______________________________________________
llvm-bugs mailing list
[email protected]
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-bugs
