https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/102867
>From 12b9f7af4cb81d0dfc6c59d9472acb0d73c8d209 Mon Sep 17 00:00:00 2001 From: Matt Arsenault <matthew.arsena...@amd.com> Date: Mon, 12 Aug 2024 13:09:55 +0400 Subject: [PATCH] AMDGPU/NewPM: Fill out passes in addCodeGenPrepare AMDGPUAnnotateKernelFeatures hasn't been ported yet, but it should be soon removable. --- .../lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 27 +++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp index 23a7a5e590071..40201d8eaa1f2 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp @@ -1773,8 +1773,35 @@ AMDGPUCodeGenPassBuilder::AMDGPUCodeGenPassBuilder( } void AMDGPUCodeGenPassBuilder::addCodeGenPrepare(AddIRPass &addPass) const { + // AMDGPUAnnotateKernelFeaturesPass is missing here, but it will hopefully be + // deleted soon. + + if (EnableLowerKernelArguments) + addPass(AMDGPULowerKernelArgumentsPass(TM)); + + // This lowering has been placed after codegenprepare to take advantage of + // address mode matching (which is why it isn't put with the LDS lowerings). + // It could be placed anywhere before uniformity annotations (an analysis + // that it changes by splitting up fat pointers into their components) + // but has been put before switch lowering and CFG flattening so that those + // passes can run on the more optimized control flow this pass creates in + // many cases. + // + // FIXME: This should ideally be put after the LoadStoreVectorizer. + // However, due to some annoying facts about ResourceUsageAnalysis, + // (especially as exercised in the resource-usage-dead-function test), + // we need all the function passes codegenprepare all the way through + // said resource usage analysis to run on the call graph produced + // before codegenprepare runs (because codegenprepare will knock some + // nodes out of the graph, which leads to function-level passes not + // being run on them, which causes crashes in the resource usage analysis). + addPass(AMDGPULowerBufferFatPointersPass(TM)); + Base::addCodeGenPrepare(addPass); + if (isPassEnabled(EnableLoadStoreVectorizer)) + addPass(LoadStoreVectorizerPass()); + // LowerSwitch pass may introduce unreachable blocks that can cause unexpected // behavior for subsequent passes. Placing it here seems better that these // blocks would get cleaned up by UnreachableBlockElim inserted next in the _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits