https://github.com/arsenm updated
https://github.com/llvm/llvm-project/pull/102867
>From bc07cf6778a51845d4b0947523bc3cb79b3a0f3f Mon Sep 17 00:00:00 2001
From: Matt Arsenault <matthew.arsena...@amd.com>
Date: Mon, 12 Aug 2024 13:09:55 +0400
Subject: [PATCH] AMDGPU/NewPM: Fill out passes in addCodeGenPrepare
AMDGPUAnnotateKernelFeatures hasn't been ported yet, but it
should be soon removable.
---
.../AMDGPU/AMDGPUCodeGenPassBuilder.cpp | 38 +++++++++++++++++++
.../Target/AMDGPU/AMDGPUCodeGenPassBuilder.h | 7 ++++
2 files changed, 45 insertions(+)
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUCodeGenPassBuilder.cpp
b/llvm/lib/Target/AMDGPU/AMDGPUCodeGenPassBuilder.cpp
index 252a70d44736dc..9fd7e24b114ddd 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUCodeGenPassBuilder.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUCodeGenPassBuilder.cpp
@@ -21,8 +21,10 @@
#include "llvm/Transforms/Utils/LCSSA.h"
#include "llvm/Transforms/Utils/LowerSwitch.h"
#include "llvm/Transforms/Utils/UnifyLoopExits.h"
+#include "llvm/Transforms/Vectorize/LoadStoreVectorizer.h"
using namespace llvm;
+using namespace llvm::AMDGPU;
AMDGPUCodeGenPassBuilder::AMDGPUCodeGenPassBuilder(
GCNTargetMachine &TM, const CGPassBuilderOption &Opts,
@@ -37,8 +39,35 @@ AMDGPUCodeGenPassBuilder::AMDGPUCodeGenPassBuilder(
}
void AMDGPUCodeGenPassBuilder::addCodeGenPrepare(AddIRPass &addPass) const {
+ // AMDGPUAnnotateKernelFeaturesPass is missing here, but it will hopefully be
+ // deleted soon.
+
+ if (EnableLowerKernelArguments)
+ addPass(AMDGPULowerKernelArgumentsPass(TM));
+
+ // This lowering has been placed after codegenprepare to take advantage of
+ // address mode matching (which is why it isn't put with the LDS lowerings).
+ // It could be placed anywhere before uniformity annotations (an analysis
+ // that it changes by splitting up fat pointers into their components)
+ // but has been put before switch lowering and CFG flattening so that those
+ // passes can run on the more optimized control flow this pass creates in
+ // many cases.
+ //
+ // FIXME: This should ideally be put after the LoadStoreVectorizer.
+ // However, due to some annoying facts about ResourceUsageAnalysis,
+ // (especially as exercised in the resource-usage-dead-function test),
+ // we need all the function passes codegenprepare all the way through
+ // said resource usage analysis to run on the call graph produced
+ // before codegenprepare runs (because codegenprepare will knock some
+ // nodes out of the graph, which leads to function-level passes not
+ // being run on them, which causes crashes in the resource usage analysis).
+ addPass(AMDGPULowerBufferFatPointersPass(TM));
+
Base::addCodeGenPrepare(addPass);
+ if (isPassEnabled(EnableLoadStoreVectorizer))
+ addPass(LoadStoreVectorizerPass());
+
// LowerSwitch pass may introduce unreachable blocks that can cause
unexpected
// behavior for subsequent passes. Placing it here seems better that these
// blocks would get cleaned up by UnreachableBlockElim inserted next in the
@@ -106,3 +135,12 @@ Error
AMDGPUCodeGenPassBuilder::addInstSelector(AddMachinePass &addPass) const {
addPass(SILowerI1CopiesPass());
return Error::success();
}
+
+bool AMDGPUCodeGenPassBuilder::isPassEnabled(const cl::opt<bool> &Opt,
+ CodeGenOptLevel Level) const {
+ if (Opt.getNumOccurrences())
+ return Opt;
+ if (TM.getOptLevel() < Level)
+ return false;
+ return Opt;
+}
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUCodeGenPassBuilder.h
b/llvm/lib/Target/AMDGPU/AMDGPUCodeGenPassBuilder.h
index efb296689bd647..1ff7744c84a436 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUCodeGenPassBuilder.h
+++ b/llvm/lib/Target/AMDGPU/AMDGPUCodeGenPassBuilder.h
@@ -28,6 +28,13 @@ class AMDGPUCodeGenPassBuilder
void addPreISel(AddIRPass &addPass) const;
void addAsmPrinter(AddMachinePass &, CreateMCStreamer) const;
Error addInstSelector(AddMachinePass &) const;
+
+ /// Check if a pass is enabled given \p Opt option. The option always
+ /// overrides defaults if explicitly used. Otherwise its default will
+ /// be used given that a pass shall work at an optimization \p Level
+ /// minimum.
+ bool isPassEnabled(const cl::opt<bool> &Opt,
+ CodeGenOptLevel Level = CodeGenOptLevel::Default) const;
};
} // namespace llvm
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