Author: Craig Topper Date: 2021-01-09T19:26:32-08:00 New Revision: 59908fc06ace351dad0b82b38c793f7b92ab4530
URL: https://github.com/llvm/llvm-project/commit/59908fc06ace351dad0b82b38c793f7b92ab4530 DIFF: https://github.com/llvm/llvm-project/commit/59908fc06ace351dad0b82b38c793f7b92ab4530.diff LOG: [RISCV] Use uint16_t instead of unsigned for opcodes in the RVV pseudo instruction table. We currently have about 7000 opcodes in the RISCVGenInstrInfo.inc enum. We can use uint16_t to store these values. We would need to grow by nearly 9x before we run out of space so this should last for a little while. This reduces the llc binary by 32K. Added: Modified: llvm/lib/Target/RISCV/Utils/RISCVBaseInfo.h Removed: ################################################################################ diff --git a/llvm/lib/Target/RISCV/Utils/RISCVBaseInfo.h b/llvm/lib/Target/RISCV/Utils/RISCVBaseInfo.h index df711f3c54db..99d8c8e7375f 100644 --- a/llvm/lib/Target/RISCV/Utils/RISCVBaseInfo.h +++ b/llvm/lib/Target/RISCV/Utils/RISCVBaseInfo.h @@ -371,8 +371,8 @@ namespace RISCVVPseudosTable { static const uint8_t InvalidIndex = 0x80; struct PseudoInfo { - unsigned int Pseudo; - unsigned int BaseInstr; + uint16_t Pseudo; + uint16_t BaseInstr; uint8_t VLIndex; uint8_t SEWIndex; uint8_t MergeOpIndex; _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
