Author: ctopper
Date: Wed Mar 1 02:04:06 2017
New Revision: 296587
URL: http://llvm.org/viewvc/llvm-project?rev=296587&view=rev
Log:
ReleaseNotes: Add some X86 target bullets.
Modified:
llvm/branches/release_40/docs/ReleaseNotes.rst
Modified: llvm/branches/release_40/docs/ReleaseNotes.rst
URL:
http://llvm.org/viewvc/llvm-project/llvm/branches/release_40/docs/ReleaseNotes.rst?rev=296587&r1=296586&r2=296587&view=diff
==============================================================================
--- llvm/branches/release_40/docs/ReleaseNotes.rst (original)
+++ llvm/branches/release_40/docs/ReleaseNotes.rst Wed Mar 1 02:04:06 2017
@@ -274,6 +274,15 @@ Changes to the MIPS Target
* Fixed several crashes involving FastISel.
* Corrected the corrected definitions for aui/daui/dahi/dati for MIPSR6.
+Changes to the X86 Target
+-------------------------
+
+**During this release the X86 target has:**
+
+* Added support AMD Ryzen (znver1) CPUs.
+* Gained support for using VEX encoding on AVX-512 CPUs to reduce code size
when possible.
+* Improved AVX-512 codegen.
+
Changes to the OCaml bindings
-----------------------------
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