Author: dsanders Date: Sat May 28 11:10:01 2016 New Revision: 271124 URL: http://llvm.org/viewvc/llvm-project?rev=271124&view=rev Log: Merging r268386: ------------------------------------------------------------------------ r268386 | dsanders | 2016-05-03 15:19:26 +0100 (Tue, 03 May 2016) | 11 lines
[mips][fastisel] ADJCALLSTACKUP has a second immediate operand. Summary: It's always zero for SelectionDAG and is never read by the MIPS backend so do the same for FastISel. Reviewers: sdardis Subscribers: dsanders, llvm-commits, sdardis Differential Revision: http://reviews.llvm.org/D19863 ------------------------------------------------------------------------ Modified: llvm/branches/release_38/lib/Target/Mips/MipsFastISel.cpp llvm/branches/release_38/test/CodeGen/Mips/Fast-ISel/callabi.ll llvm/branches/release_38/test/CodeGen/Mips/Fast-ISel/memtest1.ll Modified: llvm/branches/release_38/lib/Target/Mips/MipsFastISel.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_38/lib/Target/Mips/MipsFastISel.cpp?rev=271124&r1=271123&r2=271124&view=diff ============================================================================== --- llvm/branches/release_38/lib/Target/Mips/MipsFastISel.cpp (original) +++ llvm/branches/release_38/lib/Target/Mips/MipsFastISel.cpp Sat May 28 11:10:01 2016 @@ -1208,7 +1208,7 @@ bool MipsFastISel::processCallArgs(CallL bool MipsFastISel::finishCall(CallLoweringInfo &CLI, MVT RetVT, unsigned NumBytes) { CallingConv::ID CC = CLI.CallConv; - emitInst(Mips::ADJCALLSTACKUP).addImm(16); + emitInst(Mips::ADJCALLSTACKUP).addImm(16).addImm(0); if (RetVT != MVT::isVoid) { SmallVector<CCValAssign, 16> RVLocs; CCState CCInfo(CC, false, *FuncInfo.MF, RVLocs, *Context); Modified: llvm/branches/release_38/test/CodeGen/Mips/Fast-ISel/callabi.ll URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_38/test/CodeGen/Mips/Fast-ISel/callabi.ll?rev=271124&r1=271123&r2=271124&view=diff ============================================================================== --- llvm/branches/release_38/test/CodeGen/Mips/Fast-ISel/callabi.ll (original) +++ llvm/branches/release_38/test/CodeGen/Mips/Fast-ISel/callabi.ll Sat May 28 11:10:01 2016 @@ -1,8 +1,8 @@ -; RUN: llc -march=mipsel -mcpu=mips32 -O0 \ -; RUN: -relocation-model=pic -fast-isel-abort=1 < %s | \ +; RUN: llc -march=mipsel -mcpu=mips32 -O0 -relocation-model=pic \ +; RUN: -fast-isel-abort=1 -verify-machineinstrs < %s | \ ; RUN: FileCheck %s -check-prefix=ALL -check-prefix=32R1 -; RUN: llc -march=mipsel -mcpu=mips32r2 -O0 \ -; RUN: -relocation-model=pic -fast-isel-abort=1 < %s | \ +; RUN: llc -march=mipsel -mcpu=mips32r2 -O0 -relocation-model=pic \ +; RUN: -fast-isel-abort=1 -verify-machineinstrs < %s | \ ; RUN: FileCheck %s -check-prefix=ALL -check-prefix=32R2 declare void @xb(i8) Modified: llvm/branches/release_38/test/CodeGen/Mips/Fast-ISel/memtest1.ll URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_38/test/CodeGen/Mips/Fast-ISel/memtest1.ll?rev=271124&r1=271123&r2=271124&view=diff ============================================================================== --- llvm/branches/release_38/test/CodeGen/Mips/Fast-ISel/memtest1.ll (original) +++ llvm/branches/release_38/test/CodeGen/Mips/Fast-ISel/memtest1.ll Sat May 28 11:10:01 2016 @@ -1,8 +1,8 @@ ; RUN: llc < %s -march=mipsel -mcpu=mips32 -O0 -relocation-model=pic \ -; RUN: -fast-isel-abort=1 | FileCheck %s \ +; RUN: -fast-isel-abort=1 -verify-machineinstrs | FileCheck %s \ ; RUN: -check-prefix=ALL -check-prefix=32R1 ; RUN: llc < %s -march=mipsel -mcpu=mips32r2 -O0 -relocation-model=pic \ -; RUN: -fast-isel-abort=1 | FileCheck %s \ +; RUN: -fast-isel-abort=1 -verify-machineinstrs | FileCheck %s \ ; RUN: -check-prefix=ALL -check-prefix=32R2 @str = private unnamed_addr constant [12 x i8] c"hello there\00", align 1 _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
