Author: tstellar Date: Mon Nov 16 11:23:26 2015 New Revision: 253232 URL: http://llvm.org/viewvc/llvm-project?rev=253232&view=rev Log: Merging r244322:
------------------------------------------------------------------------ r244322 | thomas.stellard | 2015-08-07 11:34:30 -0400 (Fri, 07 Aug 2015) | 8 lines AMDGPU/SI: v_mac_legacy_f32 does not exist on VI Reviewers: arsenm Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D11810 ------------------------------------------------------------------------ Modified: llvm/branches/release_37/lib/Target/AMDGPU/SIInstructions.td Modified: llvm/branches/release_37/lib/Target/AMDGPU/SIInstructions.td URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_37/lib/Target/AMDGPU/SIInstructions.td?rev=253232&r1=253231&r2=253232&view=diff ============================================================================== --- llvm/branches/release_37/lib/Target/AMDGPU/SIInstructions.td (original) +++ llvm/branches/release_37/lib/Target/AMDGPU/SIInstructions.td Mon Nov 16 11:23:26 2015 @@ -1548,6 +1548,12 @@ defm V_WRITELANE_B32 : VOP2SI_3VI_m < // These instructions only exist on SI and CI let SubtargetPredicate = isSICI in { +let isCommutable = 1 in { +defm V_MAC_LEGACY_F32 : VOP2InstSI <vop2<0x6>, "v_mac_legacy_f32", + VOP_F32_F32_F32 +>; +} // End isCommutable = 1 + defm V_MIN_LEGACY_F32 : VOP2InstSI <vop2<0xd>, "v_min_legacy_f32", VOP_F32_F32_F32, AMDGPUfmin_legacy >; @@ -1562,12 +1568,6 @@ defm V_LSHL_B32 : VOP2InstSI <vop2<0x19> } // End isCommutable = 1 } // End let SubtargetPredicate = SICI -let isCommutable = 1 in { -defm V_MAC_LEGACY_F32 : VOP2_VI3_Inst <vop23<0x6, 0x28e>, "v_mac_legacy_f32", - VOP_F32_F32_F32 ->; -} // End isCommutable = 1 - defm V_BFM_B32 : VOP2_VI3_Inst <vop23<0x1e, 0x293>, "v_bfm_b32", VOP_I32_I32_I32 >; _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
