================ @@ -760,6 +772,61 @@ def test_riscv64_regs(self): self.expect("register read --all") ---------------- DavidSpickett wrote:
(I can't comment on lines that aren't in the diff, booo) Should the existing test have some new values added to the fp regs? I see that you didn't regenerate it. At least one of those registers would be non zero if you did I think. https://github.com/llvm/llvm-project/pull/104547 _______________________________________________ lldb-commits mailing list lldb-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits