================ @@ -34,6 +34,8 @@ def check_first_register_readable(test_case): test_case.expect("register read r0", substrs=["r0 = 0x"]) elif arch in ["powerpc64le"]: test_case.expect("register read r0", substrs=["r0 = 0x"]) + elif arch in ["rv64gc"]: ---------------- DavidSpickett wrote:
If you have a way to test rv32 as well that's great but up to you. https://github.com/llvm/llvm-project/pull/99039 _______________________________________________ lldb-commits mailing list lldb-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits