================
@@ -426,30 +532,40 @@ def FeatureSpecRestrict :
SubtargetFeature<"specrestrict", "HasSpecRestrict",
"true", "Enable architectural speculation restriction (FEAT_CSV2_2)">;
def FeatureSB : Extension<"sb", "SB",
- "Enable v8.5 Speculation Barrier (FEAT_SB)" >;
+ "Enable v8.5 Speculation Barrier (FEAT_SB)", [],
+ "FEAT_SB", "+sb", 470>;
def FeatureSSBS : Extension<"ssbs", "SSBS",
- "Enable Speculative Store Bypass Safe bit (FEAT_SSBS, FEAT_SSBS2)" >;
+ "Enable Speculative Store Bypass Safe bit (FEAT_SSBS, FEAT_SSBS2)", [],
+ "FEAT_SSBS", "", 490>;
def FeaturePredRes : Extension<"predres", "PredRes",
- "Enable v8.5a execution and data prediction invalidation instructions
(FEAT_SPECRES)" >;
+ "Enable v8.5a execution and data prediction invalidation instructions
(FEAT_SPECRES)", [],
+ "FEAT_PREDRES", "+predres", 480>;
-def FeatureCacheDeepPersist : Extension<"ccdp", "CCDP",
+def FeatureCacheDeepPersist : SubtargetFeature<"ccdp", "CCDP", "true",
"Enable v8.5 Cache Clean to Point of Deep Persistence (FEAT_DPB2)" >;
+// NOTE: BTI now has posfeat/negfeat, which it didn't before
+let ArchExtKindSpelling = "AEK_NONE" in
def FeatureBranchTargetId : Extension<"bti", "BTI",
- "Enable Branch Target Identification (FEAT_BTI)" >;
+ "Enable Branch Target Identification (FEAT_BTI)", [],
+ "FEAT_BTI", "+bti", 510>;
+let ArchExtKindSpelling = "AEK_RAND", MArchName = "rng" in
def FeatureRandGen : Extension<"rand", "RandGen",
- "Enable Random Number generation instructions (FEAT_RNG)" >;
+ "Enable Random Number generation instructions (FEAT_RNG)", [],
+ "FEAT_RNG", "+rand", 10>;
+let MArchName = "memtag" in
def FeatureMTE : Extension<"mte", "MTE",
- "Enable Memory Tagging Extension (FEAT_MTE, FEAT_MTE2)" >;
+ "Enable Memory Tagging Extension (FEAT_MTE, FEAT_MTE2)", [],
+ "FEAT_MEMTAG", "", 440>;
----------------
ilinpv wrote:
"+mte" extension FEAT_MTE, FEAT_MTE2 corresponds to FMV "memtag2", FMV "memtag"
is FEAT_MTE only.
https://github.com/llvm/llvm-project/pull/90987
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