On Tue, 2015-02-03 at 12:38 +0100, Christophe Leroy wrote: > This patchset provides a further optimisation of TLB handling in the 8xx. > Main changes are based on: > - Using processor handling of PGD/PTE Validity bits instead of testing > ourselves > the entries validity > - Aligning PGD address to allow direct bit manipulation > - Not saving registers like CR when not needed > > It also adds support to any TASK_SIZE
Please respin with just the changes that haven't already been applied to my next branch. -Scott _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
